Senior SoC Physical Design Engineer - Tapeout & PPA
Micron Memory Malaysia Sdn Bhd
Micron Technology in Folsom, CA is looking for a senior SoC Physical Design Engineer to drive implementation from netlist to GDSII for advanced memory/SoC blocks. You will work with RTL, verification, DFT, IP, packaging and manufacturing to ensure top‑level integration with strong PPA and robust signoff. The role demands hands‑on execution, ownership of blocks or top‑level integration, and strong scripting skills. A track record of tapeouts on leading foundries like TSMC is highly valued. #J-18808-Ljbffr Micron Memory Malaysia Sdn Bhd
Vacancy posted 3 days ago
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