Senior Physical Design Methodology Engineer, Innovus Flows

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. We are looking for a physical design engineer to be a part of NVIDIA’s physical design (PD) methodology team driving innovation in PD across all of NVIDIA's products – Datacenter AI, HPC, Networking, Robotics, Autonomous driving, gaming and more. As the cadence of NVIDIA’s chip cycle shortens, it poses new challenges for physical design teams to not only deliver the best PPA on the chips, but to also do it at scale, in the shortest possible time. What You'll Be Doing Develop innovative physical design methodologies for implementation of GPU, CPU, Network processors and SOC, emphasizing PPA (Power, Performance, Area) and runtime improvement of the physical design flow on advanced technology nodes. Work with internal and external partners to drive tool and methodology improvements to deliver best‑in‑class PPA solutions across all product lines. Use AI/ML approaches to CAD to improve design performance and turnaround time while improving efficiency and productivity of designers. What We Need To See MS in Electrical or Computer Engineering (or equivalent experience). Minimum 7 years of experience in Physical Design, emphasis on methodology and flow development preferred. Proven track record of PPA improvement on high‑performance and low‑power designs in advanced technology nodes. Strong understanding of physical design optimization and routing methodologies at place, CTS, route and post‑route, especially power and area efficient setup and hold optimization. Strong background in STA, extraction, timing and RC correlation. Experience in low‑power design with UPF, and use of FSDB/SAIFs for power optimization. Solid understanding of EM and IR analysis and closure. Understanding of synthesis, hierarchical design, pinning and budgeting flows. Experience with power distribution networks, design for yield and manufacturability and thermal management. Expertise and in‑depth knowledge of industry‑standard EDA tools and proficiency in programming and scripting languages such as TCL, Perl, Python, and C++. Ways To Stand Out From The Crowd Experience applying ML models, LLMs, and agentic AI techniques to EDA/PD problems (analytics, prediction, optimization). Proficiency with data analysis/ML libraries (e.g., NumPy, SciPy, scikit‑learn, PyTorch). Proficiency in Cadence EDA tool suite – Innovus, Genus, Tempus, Quantus, Joules and others. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is $168,000 - $264,500 for Level 4, and $196,000 - $310,500 for Level 5. You will also be eligible for equity and benefits. NVIDIA is committed to fostering a diverse work environment and is proud to be an equal‑opportunity employer. We do not discriminate (including in hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law. #J-18808-Ljbffr NVIDIA