Senior Bring up Methodology Lead
$196k - $310.5kNVIDIA
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brain of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As a NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world.NVIDIA Silicon Codesign Group is seeking a versatile engineer to join the HW bring-up methodology team. The SCG team is uniquely positioned to have an end-to-end view of the product development cycle - from early architecture definition, through bringup, to product release.What will you be doing:Led end-to-end planning and on-time execution of Nvidia's new chip bringup effort, from pre-silicon through production deployment.Coordinate multi-functional teams across Architecture, Build, Validation, DFT, SW, System, and Operations to drive shared bringup achievements.Improve cross-team communication, work, and handoffs.Develop and standardize methodologies, processes, and workflows for silicon bringup, creating reusable checklists and playbooks.Drive scheduling, equipment, and material logistics to support ambitious NPI and production schedules.Lead post-action reviews and convert learnings into concrete process improvements for future silicon and solution bringups.Contribute to post-silicon learnings that feed back into architecture, design, and pre-silicon validation to improve the next generation.Serve as the central point of contact for bringup timeline status, risks, and mitigations for leadership.What we need to see:MS in Engineering or related field, or equivalent experience.10+ years of experience leading complex, multi-site technical programs in semiconductor, SoC, or system/platform development.Proven experience influencing decisions and leading multi-functional teams in a fast-paced, highly technical environment.Background in silicon or system bringup.Strong leadership and problem-solving skills with the ability to think strategically about end-to-end silicon solution readiness and tactically about day-to-day execution.Enthusiastic, responsive, and passionate about process improvement, with a track record of identifying gaps and driving better methodologies.Excellent communication and interpersonal skills; able to align diverse collaborators and drive clear, timely decisions.Ways to stand out from the crowd:Hands-on experience with first-silicon bringup, post-silicon validation, or silicon debug for complex chips and or systems.Experience driving transitions from NPI to HVM, including readiness criteria, sign-off processes, and ramp optimization.Familiarity with lab operations, validation infrastructure, and common tools used in hardware bringup.Why NVIDIA? It’s not just technology, though! It is our people, some of the brightest in the world. At the center of NVIDIA's culture are our core values, like innovation, perfection, determination, and teamwork, that guide us to be the best we can be. This makes NVIDIA one of the most innovative and multifaceted places to work. We do our life's work here, and if you are creative and driven, then we want to hear from you.#LI-HybridYour base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 196,000 USD - 310,500 USD for Level 5, and 232,000 USD - 368,000 USD for Level 6.You will also be eligible for equity and benefits.Applications for this job will be accepted at least until August 1, 2026.This posting is for an existing vacancy. NVIDIA uses AI tools in its recruiting processes.NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.SummaryLocation: US, CA, Santa ClaraType: Full time
$182.36k - $273.2k
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...than ever. We are seeking a Senior / Principal Layout Engineer... ...exploration. The ideal candidate brings deep expertise in high-speed... ...and Responsibilities: ~ Lead layout-driven architecture exploration... ...Help develop next-gen layout methodologies and constraints for ~10-20+...SeniorFull timeLocal area$210.16k - $271.98k
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$200k - $260k
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...build global products and a passion for bringing new ideas to the security discipline. Key... ..., including significant time in senior technical leadership roles, strong proficiency... ...Solid understanding of software development methodologies, version control systems, and agile...Senior$146.3k - $244.1k
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...semiconductor chips.What you'll be doing:As a senior member in our team, you will work on... ...the DFT Power, Thermal & Voltage Noise Methodology areas.This will include working on... ...and power.Experience in Silicon debug and bring-up on the ATE or SLT platforms.Be able to...SeniorFull time- ...scaling rapidly, and are seeking senior technical leadership to define... ...We are seeking a Principal / Lead DSP & Systems Architect to own... ...datapaths, and float-to-fixed methodology to balance BER performance,... ...memory trade-offs. Silicon Bring-up & Validation: Partner with...
$168k - $264.5k
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$191.5k - $239.4k
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$232k - $368k
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