Sign up to access all features of our service.
  • Job search
  • Favorites
  • Create a CV
    New
  • Salaries
  • Subscriptions

Principal Design AI Engineer

$176k - $298k

Jobleads-US

Overview

Micron Technology is a world leader in innovating memory and storage solutions, accelerating the transformation of information into intelligence. As a Principal Design Engineer in the NVE Design Engineering organization, you will drive the transformation of NAND circuit development through design automation, agentic circuit-design enablement, and environment transition.

Responsibilities

  • Implement core Xpath, Ypath, and Array design during project execution and work with project teams integrating the core schematics into full‑chip schematics, validating design performance and functionalities by running block and chip level simulations using standard industry simulators and mentoring other engineers.
  • Implement analog and mixed‑signal circuit design (charge pumps, op amps, DACs, ADCs, linear regulators, oscillators, bandgap, LDO, thermometers, page buffers, PDNs, level shifters, IO buffers, RTL, Verilog) to meet specifications, validating design performance and functionalities by running block and chip level simulations using standard industry simulators and mentoring other engineers.
  • Serve as a technical authority across analog/core teams, solving sophisticated technical problems at the intersection of circuit behavior, modeling, simulation methodology, and automation reliability.
  • Develop and productize agentic enablement for circuit design, including AI/LLM‑assisted flows that support environment setup and self‑healing configuration, guided simulation and debug, intelligent corner planning and coverage closure, automated schematic/layout checks and review assistance, documentation synthesis, and verification (analog/mixed‑signal) including reproducible run recipes, golden reference management, and regression gating criteria.
  • Integrate automation with project execution, partnering with circuit designers, firmware, validation, and architecture teams to align tooling with achievement needs and deliver measurable cycle‑time reduction.
  • Collaborate with multi‑functional team members (Product Engineering, Test, Probe, Process Integration, Assembly, Marketing) to ensure automation and environmental choices support manufacturability, testability, reliability, time‑to‑market, and customer happiness.

Qualifications

  • MS (PhD preferred) in electrical engineering.
  • 8+ years of NAND design relevant proven experience, with proficient knowledge of NAND Flash memory read, program and erase algorithms.
  • Proficiency in analog/mixed‑signal circuit design (page buffers, block selectors, Xdecoder, Ydecoder, bias tables and waveforms, PDNs, level shifters, charge pumps, op amps, DACs, ADCs, linear regulators, oscillators, bandgap, IO buffers, RTL, Verilog).
  • Proficiency in analog/mixed‑signal circuit layout (page buffers, block selectors, Xdecoder, Ydecoder, bias tables and waveforms, PDNs, level shifters, charge pumps, op amps, DACs, ADCs, linear regulators, oscillators, bandgap, IO buffers, RTL, Verilog).
  • Proficient fundamentals in semiconductor and device physics and analog/mixed‑signal circuit design, with an understanding of semiconductor reliability issues including CHC, NBTI, stress, snapback, electro‑migration (EM) and IR analysis.
  • Proficiency in circuit verification and optimization, layout planning, parasitic extraction of the circuits, experience guiding layout.
  • Strong understanding of circuit design verification flows, including block‑level, subsystem‑level, and full‑chip simulations, corner management, PVT/mismatch analysis, and results qualification.
  • Experience with analog and digital simulators such as HSPICE, FastSPICE, and Verilog.
  • Proven proficiency in Python for engineering automation, including development of maintainable scripts, libraries, or frameworks that work with EDA tools for simulation control, data extraction, regression management, or reporting.
  • Proficient with Cadence design, LVS/DRC tools and UNIX.

Compensation & Benefits

US base salary range that Micron Technology estimates it could pay for this full‑time position is: $176,000.00 – $298,000.00 a year. Additional compensation may include benefits, bonuses and equity.

Benefits include medical, dental and vision plans in all locations, income protection, paid family leave, a robust paid time‑off program, paid holidays, and other standard benefit programs.

EEO Statement

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws. Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards. Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.

Additional Information

Micron offers a choice of medical, dental and vision plans, income protection, paid family leave, paid time‑off and paid holidays. For additional information about the benefit programs available, please see the Benefits Guide posted on micron.com/careers/benefits.

Micron is a dedicated employer supporting your personal wellbeing and professional growth.

Contact

To learn more about your right to work, please consult the official Micron careers website. To request assistance with the application process or for reasonable accommodations, contact Micron’s People Organization at View email address on click.appcast.io or View phone number on click.appcast.io (select option #3).

#J-18808-Ljbffr Jobleads-US
Vacancy posted 1 day ago
Similar jobs that could be interesting for youBased on the Principal Design AI Engineer in San Jose, CA vacancy
  •  ...Micron Technology is seeking a Principal Design Engineer in the NVE Design Engineering organization to drive NAND circuit development through design automation and environment transition. You will implement core analog and digital blocks, validate designs via simulations... 
    Principal

    Jobleads-US

    San Jose, CA
    1 day ago
  • $176k - $298k

    Principal Design Engineer | Micron Technology # Single PositionChange the world through innovationView All Jobs## Principal Design EngineerSan Jose...  ...productize agentic enablement for circuit design, including AI/LLM-assisted flows that support:** 1. Environment setup and... 
    Principal
    Full time
    Local area
    Immediate start

    Jobleads-US

    San Jose, CA
    1 day ago
  • $148.1k - $282.1k

    The Opportunity We're looking for a Principal Product Manager with deep fluency in the AI ecosystem to lead the evolution of our engineering platform. The rapid adoption of AI is fundamentally...  ...for Interviews:Our interviews are designed to reflect your own skills and thinking... 
    Principal
    Full time
    Temporary work
    Local area
    Immediate start
    Worldwide

    Adobe Systems

    San Jose, CA
    2 days ago
  •  ...We are looking for a Senior Principal Physical Design Engineer to own the top-level floorplan, global power networks, and timing budgets for our next-generation architecture. Requirement Advanced Chip Ownership: Proven track record of owning full-chip top-level... 
    Principal

    ACL Digital

    San Jose, CA
    1 day ago
  •  ...Corporation has opportunities at various levels for the positions below.Job Titles (Job Codes)Mixed Signal Design Engineer (MSD10)Sr. Mixed Signal Design Engineer (SMSD10)Principal Mixed Signal Design Engineer (PMSD10)Job LocationSanta Clara, CaliforniaJob DutiesDevelop and... 
    Principal
    Permanent employment
    Full time
    Work at office
    Remote work

    Nvidia

    Santa Clara, CA
    6 hours ago
  • ~7+ years of experience in AI/ML engineering or related fields ~ Proven ability to be deeply hands-on in coding and system development...  ...and rapid development workflows ~ Ability to operate at a principal level, driving technical direction and execution EOE... 
    Principal

    Real

    Santa Clara, CA
    1 day ago
  • Job DescriptionAdvantest is seeking a Senior Principal AI Test Automation Engineer todesign and deliver reliable automation for complex engineering and productiontest environments.This role combines advanced test engineering, software automation, CI/CD, andAI-enabled workflows... 
    Principal

    Advantest

    San Jose, CA
    4 days ago
  •  ...San Diego and San Jose, California or Austin, TexasNXP is searching for a hands-on AI Compiler Engineer who thrives at the convergence of cutting-edge AI, compiler tech, and hardware design. Here, you’ll not only architect and scale a production-class AI compiler... 
    Principal
    Full time
    Work at office
    Local area

    NXP Semiconductors

    San Jose, CA
    4 days ago
  •  ...next-generation computing experiences—from AI and data centers, to PCs, gaming and...  ...also requires strong hardware/software co-design to maximize performance across diverse AMD...  ...-tier AI customers. Workload Performance Engineering: Lead the profiling, analysis, and tuning... 
    Principal

    AMD

    San Jose, CA
    4 days ago
  • $262.7k - $355.4k

     ...Summary:Are you passionate about optimizing AI workloads and delivering real-world...  ...devices?We’re looking for an experienced engineer to help customers achieve best-in-class inference...  ...ArmArm’s approach to hybrid working is designed to create a working environment that... 
    Principal
    Work at office
    Local area

    ARM

    San Jose, CA
    3 days ago
  • $182k - $319k

     ...one piece of hardware that we designed, developed, manufactured or...  ...purpose to customized Cloud, AI, machine learning, Edge and 5...  ...top 3 non-X86 server providers engineering solutions for this generation...  ...future together.The Senior Principal, Design Engineering will be responsible... 
    Principal
    Local area

    Celestica

    San Jose, CA
    2 days ago
  • $200k - $250k

    Job Title: Principal RTL Design Engineer - PCIe / CXL / High-Speed SoCLocation: Santa Clara, CACompensation: $200K - $250K base DOE plus bonus and RSUs ($300K - $350K+ total comp.)Requirements: RTL Design, Verilog / SystemVerilog, PCIe / CXL / Ethernet / UALink, High-Speed... 
    Principal

    CyberCoders

    Santa Clara, CA
    15 hours ago
  • $270k - $340k

     ...physical artificial intelligence (“AI”) solutions, and other...  ...team members.What You’ll Do:As a Principal AI and ML fundamentalist who is...  ...and be responsible for:Design, implement, and evaluate novel...  ...Collaborate with other researcher engineers to prototype and validate complex... 
    Principal
    Local area
    Worldwide
    Visa sponsorship

    Archer Aviation

    San Jose, CA
    3 days ago
  • $140k - $260k

     ....This is an opportunity to join a dynamic and growing team of engineers developing extremely high-speed wireline communications transceivers...  ...techniques. The candidate will collaborate with analog designers, digital designers, applications engineers, and marketing specialists... 
    Principal
    Full time
    Work at office

    Cadence Design Systems

    San Jose, CA
    4 days ago
  • $248k - $391k

     ...tapping into the unlimited potential of AI to define the next era of computing....  ...impact on the world.We are seeking a Principal AI Workflow Engineer to join the Enterprise Integration and...  ...support large-scale, distributed systems.Design intelligent, context-aware integration... 
    Principal
    Full time

    Nvidia

    Santa Clara, CA
    4 days ago
  • $182.36k - $273.2k

     ...that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative...  ...ImpactIn this role you’ll be a member of the Data Center Engineering business group. Our group owns the digital design of high performance mixed signal ICs used in high speed... 
    Principal
    Permanent employment
    Full time
    Internship
    Work from home

    Marvell

    Santa Clara, CA
    3 days ago
  • $221.2k - $387.1k

     ...DescriptionIt all started when engineer Fred Luddy wrote code that...  ...work. Today, ServiceNow is the AI control tower for business reinvention...  ..., and field service. As Principal Forward Deployed Engineer, you...  ...their business and AI use cases, design agentic solutions on the... 
    Principal
    Work at office
    Immediate start
    Remote work
    Flexible hours

    ServiceNow

    Santa Clara, CA
    6 hours ago
  •  ...Ampere Computing LLC is seeking an AI Accelerator Principal Software Engineer - Runtime Library to lead design, development, and optimization of AI runtime software for Ampere accelerators, enabling efficient inference across models and frameworks. You will own end-... 
    Principal

    Jobleads-US

    Santa Clara, CA
    1 day ago
  • $175.8k - $293k

     ...Basic Information Job Name Principal Innovator - USA (B) Country United States...  .... We’re looking for a Principal AI Engineer to architect, build, and harden the agentic...  ...set the technical direction for how we design agents, prove what works through rigorous... 
    Principal

    Jobleads-US

    Santa Clara, CA
    15 hours ago
  • $190k - $230k

     ...- $230,000.00 Salary/year, Job Purpose: Navitas Semiconductor is seeking a highly motivated and experienced analog / power IC design engineer to lead the architecture, design, and silicon execution of next-generation power management ICs. This role is hands-on and technical... 
    Principal
    Full time

    Navitas Semiconductor

    San Jose, CA
    4 days ago
  •  ...healthcare and scientific discovery to powering AI and the technologies people rely on every...  ...is shaping the future. Whether you’re designing next-gen processors, enabling AI...  ...THE ROLE:As an AMD-AECG Design Automation Engineer, you will help build the next generation... 

    AMD

    San Jose, CA
    3 days ago
  • $250.44k - $375.67k

     ...environment for every OK-er.About the OpportunityWe are looking for a Principal AI Engineer to lead the architecture and deployment of large-scale, LLM-...  ...conversational AI platforms.What You’ll Be Doing Lead the design, development, and lifecycle management for conversational... 
    Principal

    OKX

    San Jose, CA
    1 day ago
  • $200k - $250k

    Job Title: Principal Design Verification Engineer - PCIe / High-Speed SoCLocation: Santa Clara, CACompensation: $200K - $250K base DOE plus bonus and RSUs ($300K - $350K+ total comp.)Requirements: Design Verification, High-Speed SoC, PCIe / UALink / SerDes, SystemVerilog... 
    Principal

    CyberCoders

    Santa Clara, CA
    15 hours ago
  • $250.6k - $362.6k

     ...innovative hardware platforms central to the AI era, powering Cisco’s core Switching,...  ...grow. Because full product development—from design to qualification to production—is within...  ...QualificationsBachelor’s degree in Engineering and 15+ years of ASIC related experience,... 
    Principal
    Full time
    Temporary work
    Local area
    Flexible hours

    CISCO Systems

    San Jose, CA
    1 day ago
  • $186k - $407k

     ...communicate and advance faster than ever.Principal ASIC Design EngineerAbout the RoleAt Micron, we...  ...intelligence and enable the next era of AI, ML, and advanced computing.Micron’s Interface...  ...execute.As the Principal ASIC Design Engineer, you will be the primary digital... 
    Principal
    Full time
    For contractors
    Local area
    Immediate start

    Micron

    San Jose, CA
    3 days ago
  •  ...Meta seeks a senior AI Accelerator Module Design Engineer in Santa Clara, CA to own electrical architecture and PCB design for MTIA-based accelerators. You will drive module requirements, perform package-to-board co-design, and oversee bring-up through mass production... 

    Jobleads-US

    Santa Clara, CA
    1 day ago
  • $210.87k - $329.86k

     ...and intelligent automation across its Hardware Engineering organization to improve engineering...  ...effort, accelerate development cycles, and improve design quality and first-time-right execution.We are seeking a senior AI Architect - Hardware Engineering to lead this... 
    Principal
    Temporary work
    Local area
    Worldwide
    Shift work

    Celestica

    San Jose, CA
    3 days ago
  •  ...Company Overview TENEX is an AI-native, automation-first, built-for-scale Managed Detection...  ...risk and unlimited upside. As a Principal AI Engineer at TENEX, you will be a key technical leader responsible for designing, developing, and optimizing scalable, high-... 
    Principal
    Work from home

    TenEx

    San Jose, CA
    4 days ago
  • $176k - $298k

     ...Responsibilities Design and optimize TSV (Through-Silicon Via) interface circuits...  ...Qualifications BS or MS in Electrical Engineering with 8+ years of relevant experience in...  ...Preferred: Hands on experience in applying AI to improve quality of design and... 
    Principal
    Local area

    1000 Micron Technology, Inc.

    San Jose, CA
    4 days ago
  • $232k - $368k

     ...recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA...  ...join us today!NVIDIA's Mixed-Signal Design (MSD) Photonics team is building the...  .... We are looking for a Principal Photonics IC Design Engineer to serve as the technical lead owning... 
    Principal
    Full time

    Nvidia

    Santa Clara, CA
    2 days ago

Do you want to receive more vacancies?

Subscribe and receive similar vacancies to Principal Design AI Engineer. Be the first to apply!