Chip Packaging Architect - 2.5D/3D for Optical ML Chips
$192k - $278kGoogle Inc.
corporate_fare Google place Sunnyvale, CA, USA Apply Bachelor's degree in Electrical/Computer Engineering, Computer Science, a related technical field, or equivalent practical experience. 10 years of experience in advanced packaging technology and high-volume production development. Experience with optical sub-assemblies, including CPO, silicon photonics, VCSELs, and micro-LED integration. Preferred qualifications: Experience translating technical product requirements into packaging specifications. Experience working within assembly houses or wafer foundries. Knowledge of 2.5D/3D/3.5D heterogeneous integration (interposers, TSVs, RDL, micro-bumping, high-density substrates). Understanding of end-to-end manufacturing flows, photonics fab processing, assembly processes, and reliability (component/board level). Command of physical architecture, high-speed electrical/thermal performance, and thermo-mechanical constraints (warpage, materials). About the job Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. About the job Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. As a Chip Packaging Architect on our Silicon Integration team, you will drive advanced packaging solutions (2.5D/3D/3.5D) and technologies for Machine Learning (ML) chips and custom Application-Specific Integrated Circuits (ASICs). You will collaborate with product architects, design teams, and Signal Integrity/Power Integrity (SI/PI), thermal, mechanical, assembly, and Printed Circuit Board (PCB) engineers to create high-performance packages. Your focus will span optical packaging technologies, design tradeoffs, assembly evaluation, mechanical reliability, and qualification, seeing systems through to high-volume manufacturing. The US base salary range for this full-time position is $192,000-$278,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process. Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google . Responsibilities Own product and packaging architecture for next-generation optical modules (e.g., CPO, uLED, VCSEL) and define manufacturing strategies for Tensor Processing Unit (TPU) packaging solutions. Bridge hardware domains from silicon architects to platform teams, managing technical trade-offs across manufacturing, electrical, thermal, and mechanical parameters. Drive advanced packaging concepts to high-volume manufacturing, proactively mitigating technical risks and authoring assembly processes and reliability test plans. Lead cross-functional initiatives guiding new designs and test vehicles through qualification and New Product Introduction (NPI) phases. Develop and scale the external supply chain vendor ecosystem while providing project management and clear communication across internal stakeholders and global suppliers. Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents-to-be, criminal histories consistent with legal requirements, or any other basis protected by law. See also Google's EEO Policy , Know your rights: workplace discrimination is illegal , Belonging at Google , and How we hire . Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting. To all recruitment agencies: Google does not accept agency resumes. Please do not forward resumes to our jobs alias, Google employees, or any other organization location. Google is not responsible for any fees related to unsolicited resumes. #J-18808-Ljbffr Google Inc.
$240k - $334k
...T-lines). Expertise in Co-Packaged Optics (CPO) physical implementation and advanced packaging (2.5D/3D). Understanding of device physics... ...to shape the future of AI/ML hardware acceleration. You... ...efficient in the industry. Architect test-chip strategies to characterize...3DFull timeWorldwide$187k - $270k
...experienced and highly technical DFT Architect to lead the definition, strategy,... ...IO, chiplet-based architectures, and 2.5D/3D multi-die packaging solutions. As a DFT Architect, you... ...the following: Experience in full chip DFT Architecture for complex designs....3DLocal areaShift work$175k - $350k
...Overview We are seeking a SoC Architect to define and drive the architecture... ...chiplet architectures and advanced packaging (2.5D/3D) Key Attributes ~ Strong system... ...problem: how do you connect hundreds of chips, deliver clean power at scale, and move...3DRemote workShift work- MediaTek is looking for a talented technical leader in San Jose, CA, focusing on advanced packaging technologies (2.5D/3D). This role will involve collaboration with cross-functional teams to develop innovative packaging solutions for automotive and datacenter applications...3D
- ...Optical Validation Engineer, Tech Lead San Jose, California, United... ...high-speed data center, AI/ML, and telecom applications. The... ...PIC interfaces. Validate co-packaged optics performance including high... ...coupling, thermal effects in 2.5D/3D packaging, and high-speed...3DFlexible hours
$147k - $211k
...and SOC performance analysis. The ideal candidate will have coding experience in languages such as C++, Java, or Python, and at least 2 years of experience in machine learning. This full-time position offers a competitive salary range of $147,000 to $211,000 plus bonuses...Full time$120k - $275k
...to train and run the largest ML workloads for AGI. MatX is seeking silicon micro-architects and design engineers to join our... ...tools covering the AI chip, PCIe, HBM, power, and thermal... ...Familiarity with HBM or advanced packaging (2.5D/3D) test considerations Exposure...3DFull timeWork experience placementLocal areaRemote workMonday to FridayFlexible hours- High-Speed IO Architect - PCIe/UCIe/Ethernet Subsystems The Role As... ...24G/448G scale‑up fabric/CPO optics to electrical interfaces. Define... ...retimer integration, and co‑packaged optics (CPO) readiness. Own... ...die‑to‑die integration in 2.5D/3D packages. Signal integrity expertise...3D
$152.5k - $244k
...generation semiconductor processes and 3D packaging technologies. This role is... ...and yield of advanced 2.5D/3D packaging technologies.... ...interconnects, hybrid bonding, and chip stacking. Perform root-cause analyses... ...required; experience with AI/ML for defect prediction is a plus...3DVisa sponsorship- ...Description In this AI/ML ASIC Architecture position... .... As an AI/ML ASIC Architect you will help drive new... ...Solutions with xPU in a 3D package system. You will drive the... ...-subsystems, Network on Chip, Memory controllers, and... ...certifications; and experience; (2) skills, ability,...3DTemporary workRemote workFlexible hoursShift workNight shift
$124k - $195.5k
...now seeking a passionate mechanical optical engineer who is committed to... ...within NVIDIA and define optical packaging requirements. What We Need To See... ...AutoCad. Basic understanding of flip‑chip packaging process. Proficiency with 3D CAD tools like Solidworks. Working...3DWork at office$240k - $334k
...Signal design. Experience with advanced packaging (2.5D/3D) and mixed-signal performance.... ...Experience with the design and integration of optical interconnects and Co-Packaged Optics (CPO... ..., you’ll work to shape the future of AI/ML hardware acceleration. You will have an...3DFull timeWorldwide$175k - $350k
...the tradeoffs across topology, packaging, and thermal constraints, and... ...across load conditions • Architect the digital control engine: per... ...(DCR / integrated sense), on-chip thermal diodes, and oscillator... ...familiarity: flip-chip, 2.5D/3D integration, bump map design,...3DRemote workShift work- Google Inc. is seeking a Chip Package Signal Integrity/Power Integrity Engineer in Sunnyvale, CA. You will be pivotal in driving chip packaging... ...and power implementations, collaborating closely with system architects and ASIC engineers in concurrent engineering environments....3D
- ...powers tomorrow's AI supercomputing. From chip-to-chip optical interconnects to scalable photonic... ...drive complex silicon tapeouts, advanced packaging, bring-up, validation, and system-... ...with advanced packaging technologies (2.5D/3D integration, chiplets, silicon photonics...3D
$216k - $345k
...seeking a Staff/Principal Solutions Architect to define and lead the... ...semiconductor test. This covers wafer and package test operations from start to... ...Drive adoption of AI/ML techniques for yield learning,... ...advanced packaging test challenges (2.5D/3D, chiplets, KGD). Prior...3D- ...Design Kit) Development Engineer to lead the creation, integration, and validation of design enablement infrastructure for 2.5D/3D advanced packaging , including chiplet-based architectures, silicon interposers, and heterogeneous integration technologies. This role is...3DFull time
- ...Marketing Programs Manager - 3D IC Design & Advanced Packaging Solutions Job Reference #:... ...complex world of chip, board, and system design.... ...3D IC/Advanced Packaging: Architect comprehensive, data-driven... ...packaging technologies (e.g., 2.5D, chiplets, fan-out), and...3D
$2,000 per month
...Summary Etched is looking for an exceptional Optical Systems Engineer to join our team. In... ...architectures, including Co-Packaged Optics (CPO), Near-Packaged Optics (NPO)... ...optical connectors), optical interposers, and 2.5D/3D heterogeneous integration Comfort co-designing...3DWork at officeRelocation package- ...cars to learning machines. We lead in chip design, verification, and IP integration... ...architectural discussions with chief architects to detailed analysis of silicon... ...processes (7nm/5nm/3nm), mixed-signal IP, and 2.5D/3D IC packaging is highly desirable. ~ Deep...3D
$133.5k - $183.5k
...engineering solutions used to produce virtually every new chip and advanced display in the world. We design, build... ...& Expertise Apply in-depth knowledge of advanced packaging inflections including: Logic (2.5D/3D integration, chiplets, hybrid bonding) DRAM (HBM,...3DFull timeRelocation$210k - $260k
...innovations across silicon, packaging, software, and... ..., packaging, optics, software, and systems... ...advanced single chip Flip Chip IC integration... ...hardware. You will architect and deliver... ...packages and advanced 2.5D integration. You... ...class interposers 3D packaging and stacking...3DContract work$174k - $239.5k
...solutions used to produce virtually every new chip and advanced display in the world. We... ...as a subject-matter expert in Advanced Packaging . This role sits at the intersection of... ...with Advanced Packaging trends (e.g., 2.5D/3D-IC, FOWLP, fan-out/fan-in, advanced substrates...3DFull timeRelocation$211k - $356k
...Responsible for defining, developing, and delivering advanced optical packaging architectures for next-generation optical engines,... ..., COMSOL, or similar platforms. Experience with 2.5D/3D integration, flip‑chip assembly, chiplets, fine‑pitch interconnects, or related...3DTemporary work$165k - $241.4k
Cisco Systems, Inc. is seeking an experienced engineer for their Silicon One team in San Jose, CA. The role focuses on developing full-chip timing constraints for networking SoCs, driving Static Timing Analysis, and collaborating with cross-functional teams to ensure...Full timeFlexible hours- ...candidate will have proven expertise in full-chip Static & Dynamic IR Drop analysis,... ...closely with RTL, Physical Design, STA, Packaging, and Foundry teams to drive power signoff... ...Preferred Qualifications Experience with 2.5D / 3D IC packaging signoff Familiarity with...3D
- ...nEye.ai, a well-funded optical switch startup, is poised... ...consumption, high radix, compact chip-scale design, offering... ...in time) rates. (2) Troubleshoot fabrication... .... Proficiency with 3D-CAD software and Finite... ...Experience with advanced packaging technologies and their integration...3D
- ...optoelectronic device design, production, packaging, and applications.... ...circuit design for high-speed optical interconnect applications. We... ...including MZM and MRM. · Conduct chip layout generation, circuit... ...Lumerical, RSoft, Photon Design, Tidy3D. · Experience with script...3DH1bVisa sponsorship
$124k - $171k
...solutions used to produce virtually every new chip and advanced display in the world. We... ...for logic, memory, and advanced packaging are understood by customers, partners, and... ..., hybrid bonding, wafer-level packaging, 2.5D/3D) Translate complex process flows,...3DFull timeWork experience placementRelocation$168.8k - $241.2k
...Cisco is seeking a seasoned Advanced Packaging Technical Leader to join the Packaging... ...and quality for Cisco's cutting-edge Optics products. Your Impact You will... ...in advanced packaging technology (flip-chip, fanout, 2.5D/3D, hybrid integration). Oversee various...3DFull timeContract workTemporary workLocal areaFlexible hours
Do you want to receive more vacancies?
Subscribe and receive similar vacancies to Chip Packaging Architect - 2.5D/3D for Optical ML Chips. Be the first to apply!
- remote 3d animation Sunnyvale, CA
- 3d rendering Sunnyvale, CA
- 3d animation intern Sunnyvale, CA
- 3d Sunnyvale, CA
- machine learning remote Sunnyvale, CA
- machine learning scientist Sunnyvale, CA
- machine learning intern Sunnyvale, CA
- data engineer machine learning Sunnyvale, CA
- machine learning Sunnyvale, CA
- machine learning part time Sunnyvale, CA



