FPGA Engineer - P4 - Cleared On-site

Job#: 3031681 Job Description FPGA Engineer - P4 - Cleared On-site Location: Tucson, Arizona (Onsite) Employment Type: Contract Role Overview An Electrical Engineer with experience in FPGA development or verification is sought to join our team. The role involves developing FPGA designs for major vendors, including Xilinx, Altera, and Microsemi. Designs are implemented using VHDL for applications such as gigabit serial interfaces, Radio Frequency (RF) and Electro-Optical (EO) DSP, controls, data links, and embedded processing. Ability to obtain/maintain DOD interim Secret Clearance. Key Responsibilities Design and deliver production-quality FPGA releases from concept to production. Architect FPGA-based systems to determine parts, interfaces, and Concept of Operations (CONOPS). Translate system‑level requirements into FPGA requirements. Design and code in VHDL with a focus on reliability and maintainability. Verify designs using self-checking techniques with directed and constrained random tests, while tracking functional and code coverage. Assist in driving projects and executing to program schedules on time and within budget. Create complete documentation, including requirements, verification plans, and user guides. Support internal and external technical reviews. Support customer interactions and relations. Ability to obtain/maintain DOD interim Secret Clearance. Required Qualifications Education: A Bachelor of Science degree in Computer or Electrical Engineering is required. Experience: A minimum of eight years of experience is required, including FPGA/ASIC design (VHDL coding) or verification (SystemVerilog with UVM), working with Xilinx or Microsemi devices, delivering FPGA/ASIC solutions, and hands‑on integration and debug. Security Clearance: Ability to obtain/maintain DOD interim Secret Clearance. Preferred Qualifications FPGA design experience in radar processing or image processing techniques for visual and infrared sensors. Experience in embedded systems design using ARM, Microblaze, or Nios processors. Familiarity with gigabit serial interfaces and multi‑gigabit transceivers (MGTs). Experience with constrained random verification in UVM using System Verilog. Experience with verification utilizing emulation platforms, such as Veloce. Benefits Benefits include medical, dental, vision, life, disability insurance, a 401(k) plan with company match after 12 months, a Health Savings Account (HSA), an employee stock purchase program (ESPP), and other supplemental benefits. Equal Opportunity Employer This employer is an equal opportunity employer. We do not discriminate or allow discrimination on the basis of race, color, religion, creed, sex (including pregnancy, childbirth, breastfeeding, or related medical conditions), age, sexual orientation, gender identity, national origin, ancestry, citizenship, genetic information, registered domestic partner status, marital status, disability, status as a crime victim, protected veteran status, political affiliation, union membership, or any other characteristic protected by law. This employer will consider qualified applicants with criminal histories in a manner consistent with the requirements of applicable law. #J-18808-Ljbffr Apex Systems