Remote Senior ASIC Verification Engineer - UVM/SystemVerilog
$150k - $165kEncore Semi Llc
- Remote job
Encore Semi Llc is seeking a Senior Design Verification Engineer to verify complex digital systems, including ARM-based CPUs. The role includes developing UVM/SystemVerilog testbenches and automating testing processes. The ideal candidate should have 10+ years of ASIC verification experience, strong skills in SystemVerilog and UVM, and familiarity with ARM architecture. A comprehensive benefits package is offered with a base salary between $150,000 to $165,000. #J-18808-Ljbffr Encore Semi Llc
$150k - $165k
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$170k - $250k
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$75 - $80 per hour
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$168k - $310.5k
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$136k - $218.5k
Senior ASIC Verification Engineer page is loaded## Senior ASIC Verification Engineerlocations: US, CA, Santa Claratime type: Full timeposted on... ...Oriented Programming principles and proficient in SystemVerilog/UVM.* Familiarity with memory subsystem concepts such as memory...Senior
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