Senior DFT/ATPG Logic Design Engineer — Hybrid
Intel
Intel Foundry is seeking a Senior DFT Logic Design Engineer to provide technical support on PDKs, DFT/DFM insertion, and ATPG validation for ADG customers. You will collaborate with internal teams and external customers to drive ASIC DFT quality and successful tape-outs. The role requires a strong background in CMOS processes, scripting, and experience with EDA tools. This hybrid position offers exposure to cutting-edge semiconductor technology and national security implications. #J-18808-Ljbffr Intel
Vacancy posted 1 day ago
Similar jobs that could be interesting for youBased on the Senior DFT/ATPG Logic Design Engineer — Hybrid in Santa Clara, CA vacancy
$141.91k - $269.1k
...IP portfolio, a world-class design ecosystem, and an... ...Defense, Government (ADG) - The Senior DFT Logic Design Engineer provides technical support... ...our PDKs, DFT/DFM insertion, ATPG validation methodology and... ...role will be eligible for our hybrid work model which allows employees...SeniorFull timeInternshipLocal areaImmediate startShift workIntel
Santa Clara, CA3 days ago$187k - $270.7k
...the Role The Altera DFT team is looking for a motivated DFT (Design for Testability) Design Engineer to join an industry-... ...innovation. As a Senior DFT Design Engineer,... ...specifications, test logic insertion, test mode timing constraints, ATPG, and pre-silicon validation...SeniorLocal areaShift work191 Altera Corporation
San Jose, CA3 days ago$136k - $218.5k
We are now looking for a Senior Logic Design Engineer!As a member of our CPU Logic Design Team, you will be responsible for the design of CPU on-chip... ...RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, floor-planning, ECO, bring-up & lab debug...SeniorFull timeNvidia
Santa Clara, CA3 days ago$168k - $264.5k
...We are now looking for a Senior ASIC Design Engineer to join our DFT team! Make the choice to join us today. Design-for-Test Engineering at NVIDIA... ...meaningful opportunities to advance your career. #LI-Hybrid Your base salary will be determined based on your location...SeniorNVIDIA Corporation
Santa Clara, CA1 day ago$167.7k - $245.2k
...11/12/2026 This is a hybrid role with three days per... ...development—from design to qualification to production... ...Design-for-Test (DFT) architecture that supports... ...validation of the test logic in all phases of the implementation... ...’s in Electrical Engineering or equivalent with at...SeniorFull timeTemporary workLocal areaFlexible hours3 days per weekCisco Systems, Inc
San Jose, CA22 hours ago- ...is a worldwide community of engineers, designers, and manufacturing operations... ...are developing programmable logic solutions that are changing the... ...both digital (synthesis, STA, DFT) and custom (physical/custom... ...check, SDC, and DFT flow and ATPG generation. ~ Custom Design...SeniorWork experience placementWorldwideRelocation
Lattice Semiconductor
San Jose, CA4 days ago - Hewlett Packard Enterprise in Sunnyvale, CA seeks a Senior Design Verification Engineer specializing in emulation-based verification to drive system... ...and early software bring-up on hardware accelerators in a hybrid work model. #J-18808-Ljbffr Hewlett Packard EnterpriseSenior
$168k - $264.5k
We are now looking for a motivated Senior Circuit Design Engineer to join our dynamic and growing team. If... ...design is a plusExperience with RTL, logic synthesis and verification, knowledge... ...and understanding of Design-for-test (DFT) is a plus.Proficiency in scripting language...SeniorFull timeNvidia
Santa Clara, CA5 days ago$136k - $218.5k
...looking for a top-notch ASIC engineer to join the team. The Team is... ...team collaborates with the front design team to understand the... ...verification team, timing and DFT teams.Get involved in end-to-end... ...experience.Deep understanding of logic optimization techniques and PPA...SeniorFull timeWork experience placementNvidia
Santa Clara, CA5 days ago$136k - $218.5k
NVIDIA is looking for a Senior SOC Design Engineer to join our SOC Design team! At NVIDIA, you'll collaborate... ..., CAD, Package Design, Software, DFT, and more. Our ASICs pack hundreds of... ...? If so, we want to hear from you.#LI-Hybrid Your base salary will be determined based...SeniorFull timeNvidia
Santa Clara, CA5 days ago$136k - $218.5k
...Cache Coherent Interconnects Design Team, you will be responsible... ...collaborating closely with the logic design team on micro-architecture... ...Master’s Degree in Electrical Engineering, Computer Engineering or... ...RTL design and verification, DFT, and ECO.Strong communication...SeniorFull timeNvidia
Santa Clara, CA2 days ago$168k - $264.5k
We are looking for a Senior CPU Design Engineer! NVIDIA is seeking best-in-class CPU Design Engineers to... ...the design is functional. Exercise logic design skills to optimize and meet performance... ...If so, we want to hear from you. #LI-Hybrid Your base salary will be determined...SeniorFull timeRemote workNvidia
Santa Clara, CA5 days ago$136k - $218.5k
...intelligence.We are now looking for a motivated Senior ASIC Physical Design Engineer, Netlisting to join our dynamic and... ...crossing checks and MTBF analysis, logic synthesis, netlist quality checks,... ...problem-solving skills.Background in DFT timing closure for various modes e.g....SeniorFull timeShift workNvidia
Santa Clara, CA6 days ago$163k - $236k
Participate in the physical design of complex blocks.Contribute to... ...GDS.Collaborate with internal logic and internal and external teams... ...Bachelor's degree in Electrical Engineering, Computer Engineering,... ...DRC/LVS, etc.).Understanding of DFT including Scan, MBIST and LBIST...SeniorWorldwideGoogle
Sunnyvale, CA3 days ago$136k - $218.5k
We are now looking for an ASIC Design Engineer. NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement... ...of ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, floor-planning, ECO, bring-up & lab debug...SeniorFull timeNvidia
Santa Clara, CA5 days ago$105.65k - $200.34k
Job Details:Job Description: As a GPU Logic Design Engineer, you will play a vital role in developing cutting-edge graphics IPs required for next... ....Work Model for this RoleThis role will be eligible for our hybrid work model which allows employees to split their time...Full timeInternshipLocal areaImmediate startShift workIntel
Santa Clara, CA3 days ago$200k - $290k
...-speed inference.About The Role:As a senior front-end design engineer, you will be a key part of the world-... ...closely with Design verification and DFT teams for achieving the best functional... ..., or equivalent.Can work in a hybrid work environment.8+ years of experience...SeniorRemote workCerebras Systems
Sunnyvale, CA3 days ago$168k - $264.5k
...to join us today. Design-for-Test Engineering at NVIDIA works on groundbreaking... ...solutions for DFT architecture,... ...IOs, fault modeling, ATPG and fault simulation... ...of test patterns and logic on complex and multi-million... ...to hear from you! #LI-Hybrid Your base salary will...SeniorFull timeNVIDIA
Santa Clara, CA3 days ago- NVIDIA in Santa Clara, CA, is seeking a Senior Circuit Design Engineer in Power Modeling and Simulation to join our Circuits Solutions Group. You will advance power delivery and management solutions across die to platform levels. You will model and simulate analog and...Senior
- ...GPU DFT Design Verification Engineer Work Locations (2) Submit Resume Do you love creating elegant solutions to highly complex challenges? Do... ...Ability to lead project execution Good knowledge of general logic design, and exposure to DFT is a plus Apple is an...
Apple
Cupertino, CA22 hours ago $168k - $264.5k
...seeking best‑in‑class ASIC Verification Engineers to verify the design and implementation of the world’s... ...is a plus Experience in netlist and DFT verification is a plus Perl/Python... ...eligible for equity and benefits. #LI-Hybrid Applications for this job will be accepted...SeniorNVIDIA Corporation
Santa Clara, CA1 day ago- Job description Senior DFT EngineerMoTek Technologies has an immediate... ...opening for a Senior DFT Engineer:The ideal candiate will be... ...functionality of DFT logic. Generate ATPG vectors, bring-up and debug... ...years of experience in DFT, design, or ATE fields Strong programming...SeniorImmediate start
MoTek Technologies
San Jose, CA4 days ago $167.7k - $245.2k
...close on: 11/12/2026This is a hybrid role with three days per week... ...full product development—from design to qualification to production... ...comprehensive Design-for-Test (DFT) architecture that supports ATE... ...Bachelor’s in Electrical Engineering or equivalent with at least 7+...SeniorFull timeTemporary workLocal areaFlexible hours3 days per weekCISCO Systems
San Jose, CA3 days ago$2,000 per month
...frontier intelligence. We co-design chips, racks, software, and manufacturing... ...and staffed by leading engineers, Etched is redefining the... ...motivated Design For Testability (DFT) Engineer to join our dynamic... ...ensure high confidence in DFT logic correctness. Conduct...Work at officeRelocation packageThe Consensus
San Jose, CA1 day ago- ...Design For Test (DFT) Engineer LeadStack Inc. is an award winning, one of the nation's fastest growing, certified minority owned (MBE) staffing... ...scan compression – SEQ/Ultra/TestKompress Experience with ATPG – Tetramax Experience with ATPG diagnosis, ATE debug...For contractors
LeadStack Inc.
San Jose, CA1 day ago - ...DFT Engineer Voltai is developing world models, and agents to learn... ...where AI can design and create beyond human cognitive... ...National Security Advisor, and Senior Foreign-Policy Advisor to four... .... Insert and verify DFT logic, and generate ATPG patterns that meet coverage...
Voltai
Palo Alto, CA3 days ago $100 - $130 per hour
...Design For Test (DFT) Engineer San Jose, CA 95101 Employment Type: Contract Industry: SEMI - Semiconductor Job Description Job Title... ...scan compression – SEQ/Ultra/TestKompress Experience with ATPG – Tetramax Experience with ATPG diagnosis, ATE debug...Contract workFor contractorsProtingent
San Jose, CA1 day ago- ...Description The team is looking for a Design-for-Test contractor to test and validate the... ...and Physical Design teams to implement DFT and test designs which will impact the product... ...SEQ/Ultra/TestKompress Experience with ATPG - Tetramax Experience with ATPG...For contractors
- Lightmatter is hiring a Design Verification Engineer in Mountain View to advance verification across digital, analog, and photonic devices using... ...exposure to post-silicon validation and AMS verification, and a hybrid work model in a cutting-edge photonics-enabled data center...Senior
$136k - $218.5k
We are looking for an Engineer to verify the design and implementation of the world’s leading SoC's and GPU's. This position offers the opportunity... ...'ll closely with multi-functional teams, circuit and logic design, verification, test engineering to accomplish tasksWhat...SeniorFull timeNvidia
Santa Clara, CA5 days ago
Do you want to receive more vacancies?
Subscribe and receive similar vacancies to Senior DFT/ATPG Logic Design Engineer — Hybrid. Be the first to apply!
Related searches
- data center design engineer Santa Clara, CA
- ic design engineer Santa Clara, CA
- chief design engineer Santa Clara, CA
- vlsi design engineer Santa Clara, CA
- system design engineer Santa Clara, CA
- digital design engineer Santa Clara, CA
- senior product design engineer Santa Clara, CA
- senior manager product engineering Santa Clara, CA
- senior design verification engineer Santa Clara, CA
- product engineer Santa Clara, CA