Senior ASIC Verification Engineer

Senior Asic Verification Engineer

Cornelis Networks is hiring a Senior Asic Verification Engineer with advanced skills and knowledge in key areas required to verify world-class SoCs to be deployed in high performance computing, high performance data analytics, and artificial intelligence interconnect solutions. As a member of the Asic leadership team with hands-on technical experience, you will be responsible for the verification closure of entire projects, including design modules, sub-systems, and SoCs. You will drive a wide range of activities including test-planning, Uvm based testbench development, regression and coverage closure. You will have the opportunity to partner and collaborate with Asic design, emulation, system hardware and post-silicon teams and help create a first-pass silicon success.

Key Technical Responsibilities:

• Define overall Soc level verification strategy, technical planning, direction
• Enable and drive the development of Uvm environments to verify Rtl at block, unit, and SoC levels
• Develop and execute functional tests according to verification test plans
• Instrument Tb for functional and code coverage and drive to closure based on the coverage metrics
• Collaborate with cross-functional teams like design, software, emulation and silicon validation teams towards ensuring the highest design quality

Team Responsibilities:

• Day-to-day guidance and leadership of team members
• Driving results via mentoring, coaching, and counseling
• Education of team in the use of Ai tools to enhance productivity and efficiencies
• Generation and enforcement of coding and verification guidelines

Minimum Qualifications:

• 8+ years of experience with the following:
• Hands-on experience with writing code using Uvm/System Verilog
• Verification for complex SoCs that include multiple clock and reset domains, using Vcs or equivalent simulation tools
• Debugging fails to the line of Rtl, closing out bug fixes, using Verdi or equivalent debug tools
• Experience in ground up testbench development
• Experience with revision control systems like Git or SVN etc.
• B.S. Degree in Computer Engineering, Computer Science, or Electrical Engineering

Preferred Qualifications:

• M.S. Degree in Computer Engineering, Computer Science, or Electrical Engineering
• 8+ years of relevant experience in networking hardware verification, proven expertise in verifying 50G, 100G, 400G Ethernet Mac/Pcs protocols, Tcp/Ip, RDMA/RoCe, IpSec. and their application in high-speed data processing/networking
• One or more scripting languages (Tcl, Python, Perl, Shell-scripting)
• Track record of first-pass success in Asic and Systems

Location: This is a remote position for employees residing within the United States.