Chip Lead

Silicon Labs (NASDAQ: SLAB) is the leading innovator in low-power wireless connectivity building embedded technology that connects devices and improves lives. Merging cutting-edge technology into the worlds most highly integrated SoCs Silicon Labs provides device makers the solutions support and ecosystems needed to create advanced edge connectivity applications. Headquartered in Austin Texas Silicon Labs has operations in over 16 countries and is the trusted partner for innovative solutions in the smart home industrial IoT and smart cities markets. Learn more at .

Chip Lead

The Role

The Chip Lead provides technical leadership for the architecture design integration and execution of complex wireless System-on-Chip (SoC) products from initial product definition through silicon bring-up and production.

This role requires deep technical expertise in SoC architecture microarchitecture and design including processor subsystems memory architectures interconnects clock and reset architectures low-power design digital and mixed-signal IP and wireless connectivity. The Chip Lead is responsible for translating product requirements into a cohesive SoC architecture driving key technical decisions and design tradeoffs and ensuring that the chip meets its functional performance power area and cost objectives.

The Chip Lead works hands-on with engineering teams to drive subsystem design IP integration verification physical implementation and design closure. The role requires the ability to identify and resolve complex technical issues challenge design assumptions evaluate architectural alternatives and make informed engineering decisions across multiple disciplines.

As the overall technical owner of the chip the Chip Lead coordinates engineering execution across global design teams establishes technical milestones manages design dependencies and risks and drives the SoC through tapeout silicon bring-up and production readiness.

Responsibilities

• Lead the technical development and execution of complex wireless SoCs from product definition through design silicon validation and production.

• Definition and Planning

• Work closely with product marketing systems engineering and SoC architects to review product requirements and contribute to the definition of the SoC.

• Serve as a key stakeholder in SoC architecture development providing input on architectural decisions design tradeoffs technical feasibility implementation complexity and IP reuse.

• Identify technical risks integration challenges and cross-functional dependencies early in the development cycle.

• Develop the chip design execution plan including technical milestones design dependencies and engineering resource requirements.

• Provide technical design collateral and engineering assessments to support product approval gates.

• Project Execution

• Provide hands-on technical leadership throughout SoC design integration verification and physical implementation.

• Work closely with functional and subsystem leads to drive design execution resolve technical issues and ensure successful integration of all SoC components.

• Review technical solutions identify architectural and implementation issues and collaborate with SoC architects and functional leads to resolve them.

• Work with verification teams to ensure comprehensive SoC verification including system-level functionality interfaces power modes and critical use cases.

• Drive technical readiness for tapeout ensuring design completeness verification closure and resolution of critical design issues.

• Represent the design community to provide succinct weekly status and attend the cross functional meeting. Drive design action items to closure.

• Validation to Production

• Provide technical leadership during silicon bring-up validation characterization and qualification.

• Work closely with validation software RF analog and product engineering teams to debug complex silicon issues and determine root causes.

• Correlate silicon behavior with design expectations simulation results and architectural specifications.

• Drive resolution of silicon issues through design changes firmware workarounds or silicon revisions as appropriate.

• Lead technical execution of silicon revisions including metal-only and full-layer respins when necessary.

• Ensure the SoC meets its functional performance power and quality requirements before production release.

Skills you will need:

• Capable of leading complex IP SOC development projects execution. Experience coordinating with contractors a plus.

• Top-down planning and execution of SOC projects.

• Experience in full-chip development cycle

• Able to build strong technical team.

• Hands-on experience in architecture micro-architecture digital design processes

• Knowledge of high-speed interfaces like USB PCIe Ethernet Mobile DDR Quad/Octa-SPI

• Knowledge of peripheral interfaces like SDIO UART I2S I2C PWM CAN etc.

• Knowledge of processors like RISC-V and ARM processors

• Knowledge of design signoff flows including Lint CDC Formal Verification Synthesis Constraints and STA Timing Closure

• Knowledge of DFT including Scan ATPG MBIST

• Knowledge of low power design methodology (static/dynamic clock gating power gating dynamic voltage and frequency scaling)

• Knowledge of hardware accelerators

• Knowledge of Verilog and System Verilog

• Knowledge of scripting languages like Perl Python Tcl shell

• 12 years of experience with Bachelor or Masters degree in Electrical or Computer Engineering
  

Benefits & Perks

You can look forward to the following benefits:

• Great medical (Choice of PPO or Consumer Driven Health Plan with HSA) dental and vision plans
• Highly competitive salary
• 401k plan with match and Roth plan option
• Equity rewards (RSUs)
• Life/AD&D and disability coverage
• Flexible spending accounts
• Adoption assistance
• Back-Up childcare
• Additional benefit options (Commuter benefits Legal benefits Pet insurance)
• Flexible PTO schedule
• 3 paid volunteer days per year
• Charitable contribution match
• Tuition reimbursement
• Free downtown parking
• Onsite gym
• Monthly wellness offerings
• Free snacks
• Company updates with our CEO

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The annualized base pay range for this role is expected to be between $160650 - $298350 USD. Actual base pay could vary based on factors including but not limited to experience geographic location where work will be performed and applicants skill set. The base pay is just one component of the total compensation package for employees. Other rewards may include an annual cash bonus equity package and a comprehensive benefits package.

Silicon Labs is an equal opportunity employer and values the diversity of our employees. Employment decisions are made on the basis of qualifications and job-related criteria without regard to race religion color national origin gender sexual orientation age marital status veteran status or disability status or any other characteristic protected by applicable law.