CPU Server Physical Design Timing Engineer
$142.2k - $213.4kQualcomm
Company:
Qualcomm Technologies, Inc.
Job Area:
Engineering Group, Engineering Group > CPU Engineering
General Summary:
NUVIA is now part of Qualcomm. Our mission is to reimagine silicon and create computing platforms that will transform the industry. You will have the opportunity to work with some of the most talented and passionate engineers in the world to create designs that push the envelope on performance, energy efficiency and scalability.
About The Role:
In this role you will have the opportunity to define, develop and drive CPU timing closure for Oryon CPU Cores. As a CPU Physical Design Timing Engineer, you will work with microarchitecture and RTL design team to develop timing constraints, drive implementation of the designs to meet aggressive power, area and performance goals using industry standard tools/flows. One of your primary responsibilities will lie in coding scripts used with STA native tools and also useful in enabling CPU timing infrastructure and methodology impacting multiple CPU projects in Qualcomm. You will have the opportunity to collaborate with Qualcomm central timing technology & methodology team and also interact with CPU implementation team to drive PPA goals of CPU. You will have the opportunity to carve out a strong professional growth path working on industry leading technology nodes N2/N3.
Key Responsibilities:
- STA setup, convergence, reviews and signoff for multi-mode, multi-voltage domain designs of Oryon CPU Cores.
- Timing analysis, validation and debug across multiple PVT conditions using PT/Tempus.
- Run Primetime and/or Tempus for STA flow optimization and Spice to STA correlation.
- Find out the root cause of timing miscorrelation at different design levels in functional and test mode, propose solutions.
- Evaluate multiple timing methodologies/tools on different designs and technology nodes.
- Work on automation scripts within STA/PD tools for methodology development.
- Good Technical writing and Communication skills, should be willing to work in cross-collaborative environment
- Strong experience in design automation using TCL/Perl/Python.
- Familiar with digital flow design implementation RTL to GDS : ICC, Innovous , PT/Tempus
Minimum Qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 2+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
- Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 1+ year of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
- PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field.
Preferred Qualification/Skills:
- Strong expertise in STA timing analysis basics, AOCV/POCV concepts, CTS, defining and managing timing constraints, Latch transparency handling, 0-cycle, multi-cycle path handling
- Hands-on experience with STA tools - Prime-time, Tempus
- Have experience in driving timing convergence at Chip-level and Hard-Macro level
- In-depth knowledge cross-talk noise, Signal Integrity, Layout Parasitic Extraction, feed through handling
- Knowledge of ASIC back-end design flows and methods and tools (ICC2, Innovus)
- Expert in scripting languages – TCL, Perl, Python
- Basic knowledge of device physics
Pay range and Other Compensation & Benefits:
- $142,200.00 - $213,400.00
- We also offer a competitive annual discretionary bonus program
- and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus).
- In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play.
Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail View email address on click.appcast.io or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).
EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
#J-18808-Ljbffr- ...Analyze CPU microarchitecture (pipeline stages, execution... ...tradeoffs on timing, power, and area Develop and own gate-level design for CPU blocks: standard... ...electromigration analysis, and physical/electrical signoff... ...s degree in Electrical Engineering, Computer Engineering,...SuggestedFull time
$100k
...technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a... ...is looking for a mid- to senior-level Physical Design Engineer with a strong background in static timing analysis (STA). In this role, you will help converge...SuggestedPermanent employment$184.7k - $324.8k
...will be responsible for all aspects of timing including working with the... ...and timing closure.DescriptionAs the CPU Design Timing Engineer, you will be responsible for the timing... ...other similar designsUnderstanding of physical design tools and methodology including...SuggestedRelocation$100k
...developed a high performance RISC-V CPU from scratch, and share a passion for... ....Tenstorrent is looking for a Physical Design CPU Methodology Engineer who defines and drives the implementation... ...implementation and signoff, including timing closure, power optimization, SI, EM/...SuggestedPermanent employmentRemote work$184.7k - $324.8k
...industry-recognized and innovative CPU design team; you will contribute to... ...and key problems in the physical design (PD) methodology and optimization... ..., CAD, and design teams to engineer new flows/algorithms to... ...in digital circuits, timing/power concepts, and logic designExperience...SuggestedRelocation$184.7k - $324.8k
...groundbreaking Apple products!Apple’s Silicon Engineering Group (SEG) is hiring hardworking engineers for CPU block-level physical design.DescriptionAs a CPU Physical Design... ...level teams on the aspects of CPU floorplan, timing, power, reliability, and testability• Will...Relocation$147.9k - $221.9k
Company:Qualcomm Technologies, Inc.Job Area:Engineering Group, Engineering Group CPU EngineeringGeneral Summary:As a CPU Physical Design Infrastructure and Automation Engineer,... ...with Synthesis, place and route and signoff timing/power analysis.Proficiency in scripting (...Work experience placementWork from home$147.9k - $221.9k
...Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group CPU Engineering General Summary: As a CPU Physical Design Infrastructure and Automation Engineer,... ...Synthesis, place and route and signoff timing/power analysis. Proficiency in...Work experience placementWork from home$209.3k - $313.9k
...Technologies, Inc. Job Area: Engineering Group, Engineering Group CPU Engineering General... ...in the world to create designs that push the envelope on... ...scalability. As CPU Physical Design CAD engineer, you... ...place-and-route, analysis, timing sign-off and PDV...Work experience placementWork from homeWorldwide- ...SoC Physical Design Engineer, STA/Timing Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could...
- ...Come join the team and see how you can make a lasting impact on the world. We are now looking for a motivated Senior Physical Design and Timing Engineer to join our dynamic and growing team. If you want to challenge yourself and be a part of something great, join us...Full time
$125.7k - $203.1k
...Because full product development—from design to qualification to production—is within... ...digital world. Your Impact As a Physical Design Engineer, you will play a key role in the full... ...You will optimize floor planning and timing, analyze and improve backend design flows...Full timeTemporary workWork experience placementInternshipLocal areaFlexible hours$125.7k - $203.1k
...Because full product development—from design to qualification to production—is within... ...the digital world. Your Impact As a Physical Design Engineer, you will play a key role in the full... ...You will optimize floor planning and timing, analyze and improve backend design flows...Full timeTemporary workWork experience placementInternshipLocal areaFlexible hours$213k - $287.5k
...cloud services.We are seeking an experienced Sr. Physical Design STA Engineer to build the next generation of our cloud server platforms. Our success depends on our world-... ...flows for block and full-chip level static timing analysis• Write, debug & validate timing constraints...Full timeLocal areaFlexible hours- ...Astera Labs is seeking a Principal Physical Design Engineer to own the RTL2GDS flow for high-performance connectivity SoCs. You will drive floorplanning... ...tapeout execution from RTL to tapeout, ensuring PPA and time-to-market goals are met for AI-scale systems. #J-18808-...
- ...Own physical implementation of accelerator blocks and top level: synthesis... ..., and utilization Close timing, power, and area (PPA)... ...delivery and density: power grid design, IR-drop and electromigration... ...Master's degree in Electrical Engineering, Computer Engineering, or a related...Full time
- ...optimization. We are hiring an experienced Physical Design Engineer to join a high-performing silicon... .../SoC designs while ensuring optimal timing, congestion, and power distribution.... ...Experience working on high-performance CPU, GPU, AI/ML, or networking SoCs is a plus...Contract work
$168k - $264.5k
...is looking for best-in-class Senior Physical Design Methodology Engineer(s) - PPA Improvement Technology Scaling... ...distribution, chip assembly and P&R, timing analysis and closure, power and noise... ...with Physical Design related to CPU designs is a plus Strong background...$133.2k - $192.83k
...industry. About the Role We are seeking a Physical Design Engineer to join our Silicon Engineering and... ...from RTL through GDSII while driving timing closure, power optimization, physical verification... ...implementing high‑performance CPU, FPGA, AI accelerator, networking, or...Local areaShift work$136k - $218.5k
...As a member of our CPU Cache Coherent Interconnects Design Team, you will be responsible for the physical design of CPU on-chip interconnect network and last-level caches, working on implementation, synthesis and timing closure while collaborating closely with the logic...Full time- ...Annapurna Labs (U.S.) Inc. in Cupertino seeks a skilled SSTA engineer to design and optimize timing flows for ASICs. You will develop timing constraints, run STA, and collaborate with RTL/Arch teams to deliver high-performance, cost-efficient silicon. The role emphasizes...
$180k - $280k
...the world's largest AI chip, 56 times larger than GPUs. This architecture... ...The RoleJoin our close-knit physical design team where you will drive high-impact... ...design tools.BS or MS in Electrical Engineering.Preferred:Knowledge of high speed CPU/GPU design a plus.Experience with...$168k - $264.5k
...We are looking for a Senior CPU Design Engineer!NVIDIA is seeking best-in-class CPU Design Engineers... ..., verification engineers, and physical design engineers to accomplish your tasks... ...skills to optimize and meet performance, timing and power targets. Deliver a synthesis/...$100k
...have developed a high performance RISC-V CPU from scratch, and share a passion for... ...Tenstorrent is seeking a highly skilled Physical Design Engineer to drive the critical Die-to-Die (D2D)... ...physical challenges that come with them (timing, signal integrity, power integrity)....Permanent employmentRemote work$237k - $356k
...is a semiconductor design company for a new era... ...innovative approach to CPU design focused on... ...Senior Principal Design Engineer specializing in Static Timing Analysis (STA) and... ...expertise in STA, physical design, timing analysis... ...-performance CPU or server-class SoC timing...Local area$178.85k - $218.59k
## Staff RTL Design Engineer - CPU LS/PF/MMUApplylocations: Santa Clara, California, United States:... ...world a better place, one processor at a time. Are you ready? To learn more about... ...verification test plans.* Work with the physical implementation team to implement and optimize...Work experience placement$168k - $264.5k
We are now looking for a Senior CPU Design Methodology Engineer!The complexity of chip development has greatly... ...directly with unit-level ASIC, Physical Design, CAD, Package Design, Software... ..., Hillsboro; US, TX, Austin; US, AZ, Remote; US, CA, Santa ClaraType: Full timeFull timeRemote work$100k
...have developed a high performance RISC-V CPU from scratch, and share a passion for... ...is seeking an exceptional Senior-level Physical Design Engineer to drive top-level implementation of our... ...-voltage domain designs.Mastery of timing closure, EM/IR analysis, and physical verification...Permanent employment$168k - $264.5k
...impact on the world.We are looking for a physical design engineer to be a part of NVIDIA’s physical... ...it at scale, in the shortest possible time. Your work in physical design methodology... ...methodologies for implementation of GPU, CPU, Network processors and SOC, with emphasis...Full timeRemote work$100k
...have developed a high performance RISC-V CPU from scratch, and share a passion for... ...seniorities.Tenstorrent is seeking a talented Physical Design Engineer to implement high-performance blocks... ...experience in synthesis, PnR, and timing closure on taped-out designs.Expertise...Permanent employment
Do you want to receive more vacancies?
Subscribe and receive similar vacancies to CPU Server Physical Design Timing Engineer. Be the first to apply!
- database developer Santa Clara, CA
- database engineer Santa Clara, CA
- senior fpga design engineer Santa Clara, CA
- ic design engineer Santa Clara, CA
- senior asic design engineer Santa Clara, CA
- data center design engineer Santa Clara, CA
- design engineer Santa Clara, CA
- senior software design engineer Santa Clara, CA
- product engineer Santa Clara, CA
- product engineering intern Santa Clara, CA



