ASIC DFT Technical Leader - CDC
$183.8k - $263.6kCisco Systems
The application window is expected to close on: 09/01/2026Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received.Meet the Team: The Common Hardware Group (CHG) creates innovative hardware platforms central to the AI era, powering Cisco’s core Switching, Routing, and Wireless products for organizations globally. Our innovations in silicon, optics, and hardware platforms—like Silicon One—are shaping the technology industry. We're a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow. Because full product development—from design to qualification to production—is within our team, we’re able to think differently, experiment more, and work quickly. Join us to power the future of the digital world. Your Impact:Define, design and verify ASIC and ASIC subsystems to be deployed in a range of Cisco platforms. Contribute to a multi-disciplined engineering team to meet the power, performance, and area goals for products. Design, document, and develop ASIC subsystems for release in high volume and quality. Help define the process, methods, and tools for design and implementation of complex developments.What You’ll Do: Leads the CDC/RDC (Clock Domain Crossing / Reset Domain Crossing) methodology in silicon one chipsDesign & implement robust and reusable RTL with CDC/RDC considerationsSpec comprehensive CDC/RDC check flows and work with CAD team to implementReview and approve CDC/RDC constraints and waiversPerform static glitch analysisImprove design with prevention of static glitch hazardMinimum Qualifications:Bachelor’s with 8+ years or related experience, or master’s with 6 + years of related experience, or PhD + 3 years of related experiencePrior experience with RTL development skills and experiencesPrior experience with CDC/RDC concepts and relevant design implementationPrior Experience on maintaining CDC/RDC flow and signing-off constraints and waiversPrior experience with static glitch harzads and experience on the relevant analysis on synthesis optimized gate netlistsPreferred Qualifications: Experience on SDC constraints developmentExperience on VCS simulation SVA (SystemVerilog Assertions)Why Cisco? At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. We are Cisco, and our power starts with you. Message to applicants applying to work in the U.S. and/or Canada:The starting salary range posted for this position is $183,800.00 to $263,600.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits.Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process.U.S. employees are offered benefits, subject to Cisco’s plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time.U.S. employees are eligible for paid time away as described below, subject to Cisco’s policies:10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees1 paid day off for employee’s birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by CiscoNon-exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employeesExempt employees participate in Cisco’s flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations)80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours of unused sick time carried forward from one calendar year to the nextAdditional paid time away may be requested to deal with critical or emergency issues for family membersOptional 10 paid days per full calendar year to volunteerFor non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco’s policies.Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows:.75% of incentive target for each 1% of revenue attainment up to 50% of quota;1.5% of incentive target for each 1% of attainment between 50% and 75%;1% of incentive target for each 1% of attainment between 75% and 100%; andOnce performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation.For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid.The applicable full salary ranges for this position, by specific state, are listed below:New York City Metro Area:$183,800.00 - $303,100.00Non-Metro New York state & Washington state:$163,600.00 - $269,800.00* For quota-based sales roles on Cisco’s sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined.** Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.Job SummaryJob number: 2017935Date posted : 2026-07-07Profession: Product and EngineeringEmployment type: Full time
$210.6k - $305.1k
...You will be part of the Silicon One development organization as an ASIC implementation engineer in San Jose, CA. As a member of this team... ...networking chips.Your Impact:You will be the lead to drive the DFT/DFx and quality process through the early product life cycle: the...SuggestedFull timeTemporary workLocal areaFlexible hours$186.9k - $267.7k
...revolutionary solutions by designing, developing and testing some of the most complex ASICs being developed in the industry.Your Impact:As a technical leader, you will own and drive end-to-end DFT flow architecture, building and maintaining scalable CAD infrastructure that...SuggestedFull timeTemporary workLocal areaFlexible hours$210.6k - $305.1k
...developing and testing some of the most complex ASICs being developed in the industry. Your ImpactAs an ASIC Technical Leader, you will sit at the forefront of networking... ...You will drive ground breaking Design-for-Test (DFT) strategies, bridging the gap between architecture...SuggestedFull timeTemporary workLocal areaFlexible hours$168.8k - $241.2k
...ImpactYou will be in the Silicon One development organization as an ASIC DFT STA Technical Lead. You are a detail-oriented STA engineer with strong... ..., no clock, etc.Your role may include SDC validation, CDC delay check, and SDC flow development.Developing methodologies...SuggestedFull timeTemporary workWork experience placementLocal areaFlexible hoursShift work$183.8k - $263.6k
...'s ground-breaking solutions by designing, developing and testing some of the most complex ASICs being developed in the industry. Your ImpactAs an ASIC DFT - Emulation Technical Lead, you will play a critical role in driving the DFT emulation strategy for Silicon One....SuggestedFull timeTemporary workLocal areaFlexible hours$183.8k - $263.6k
...Join us to power the future of the digital world. Your Impact:You will be in the Silicon One development organization as an ASIC Technical Leader- DFT. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT...Full timeTemporary workLocal areaFlexible hours$168.8k - $241.2k
...us to power the future of the digital world.Your ImpactSet vision and strategy for ASIC verification methodology and execution across multiple programs and product linesServe as technical authority and mentor for verification teams, fostering technical excellence and...Full timeTemporary workLocal areaFlexible hours$210.6k - $305.1k
...are a collaborative unit focused on pushing the boundaries of ASIC design for advanced process nodes. As a member of the team, you... ...specifications are metOversees all physical design functions bringing technical expertise to highly complex scenariosInterfaces with vendors...Full timeTemporary workLocal areaFlexible hours$143.8k - $230k
...role, you will be the primary technical anchor responsible for the top... ...define the Clock Domain Crossing (CDC) strategy, and establish block... ...direct industry experience in ASIC/SoC digital design, with a... ...interconnects).Familiarity with DFT (Design for Test) planning,...Full timeLocal area$183.8k - $263.6k
...think differently, experiment more, and work quickly. Join us to power the future of the digital world. Your ImpactParticipate in the ASIC design verification for Cisco high-end switching products.Lead, architect, develop, and maintain block, cluster, and top-level...Full timeTemporary workLocal areaFlexible hours$122.44k - $232.19k
...manufacturing supply chain.Position OverviewWe seek a DFT Application Engineer to provide technical support to Intel Foundry Services customers on PDKs, DFT... ...& Quality LeadershipDrive quality improvements in ASIC DFT/DFM and ATPG validation methodology, capability/flow...Full timeInternshipLocal areaImmediate startShift work$192k - $279k
...integrity.Partner with internal teams (RTL, DFT, methodology, packaging) to achieve... ...route, and timing closure) for high-speed ASICs in advanced process nodes.Experience in Python... ...physical sign-off, and 2.5D/3D packaging.Technical leadership experience managing execution...Worldwide$183k - $247.6k
...and software stacks enable us to take on technical challenges that have never been seen before... ...technologies. We’re looking for an ASIC Design Eengineer to help us trail-blaze new... ...SOC, ensure correct clock/reset/functional/DFT signal routing- Analyze design, microarchitecture...Local areaFlexible hours$186.9k - $267.7k
...post silicon validation tests in the lab.Minimum QualificationsBachelor’s degree in Electrical or Computer engineering and 8+ years of ASIC Design experience, or Master’s degree in Electrical Engineering or Computer Engineering and 6+ years of ASIC Design experience, or...Full timeTemporary workLocal areaFlexible hours$210.6k - $305.1k
...flows and methodologies, identifying efficiency gaps and implementing incremental or transformative enhancements.Work closely with RTL, DFT, implementation, EDA vendors, and tool/flow teams to enable best-in-class design methodology.Proficiency in low-power design...Full timeTemporary workLocal areaFlexible hours$182.36k - $273.2k
...closely with the architecture, floor planning, backend, verification, DFT, STA teams, and other cross-functional teams to produce high-... ...PCIe, and D2D.Experience in micro-architecture of complex custom/ASIC products, focusing in one or more of the following areas: NPU,...Permanent employmentInternshipWork from home$168.8k - $241.2k
...are received.Meet the TeamCisco is seeking a seasoned Packaging Technical Leader to join the Semi & Optics Packaging team within our world-... ...advanced packaging technology and quality for Cisco’s cutting-edge ASIC and silicon photonic products.Your ImpactYou will operate at...Full timeContract workTemporary workLocal areaFlexible hours$163k - $237k
Engage with DFT and Design teams at early design stage to define requirements for ATE tests and manufacturing test flow.Generate and verify... ...translations, and integrate DFT verification into the overall ASIC design flow.Prepare silicon debug verification strategy, test...Worldwide$183.8k - $263.6k
...debug hardware prototypes and resolve complex system issues. Lead technical discussions and guide New Product Introduction (NPI)... ...from kernel modules to applicationsExperience working with NPU ASIC bring up, SDK and Datapath bring upPreferred QualificationsExperience...Full timeTemporary workWork at officeLocal areaFlexible hours$186.9k - $267.7k
...software engineering roadmap.• May lead small-to-medium features from technical design through completion.• Contribute to delivery of high-... ...and SDK development experience on NPU/DPU or networking ASICs· Experience with traffic generator tools such as IXIA & SpirentPreferred...Full timeTemporary workLocal areaFlexible hours$183.8k - $263.6k
...shaping the future of networking technology.Design and develop system software for Data Center products based on Silicon One based ASICs.Develop features targeted for AI/ML use cases and deployments.Develop SDK for next-generation feature-rich network ASIC.Collaborate...Full timeTemporary workWork at officeLocal areaFlexible hours3 days per week$157.3k - $212.8k
...world-class server infrastructure; we’re handling massive scale and rapid integration of emergent technologies. We’re looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while ensuring high design quality and making the right...Local areaWork from homeFlexible hours$168.8k - $241.2k
...digital world. Your Impact Hardware design technical lead is a key member of the Cisco Purpose... ...based on Silicon One and/or merchant ASIC.Responsible for system and board level specification... ...with multiple groups including ASIC, DFT, Signal Integrity, software, Diagnostics...Full timeTemporary workLocal areaFlexible hours$186.9k - $267.7k
...team! This team works on Hyperscale network and Enterprise Data Center switches based on Cisco Silicon One ASIC. This is a unique opportunity to grow your technical skills and will allow for visibility and recognition across multi-functional teams within Cisco. We value...Full timeTemporary workLocal areaFlexible hours$168.8k - $241.2k
...and collect schematicsGuide layout and routing phase of the designWrite hardware specs, develop test plans, bring up hardware with ASIC teamsDebug issues the lab using analyzers, scopesCollaborate multi-functionally with architects, developers, and vendors within Cisco...Full timeTemporary workLocal areaWorldwideFlexible hours$152k - $230k
...to join us today.Design-for-Test Engineering at NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's most complex semiconductor chips.What you'll be doing...Full time- ...of SystemVerilog/Verilog (for correlating failures to rtl if needed) Good to have (not critical): * Scan insertion * RTL DFT Verification capability (MBIST, clocking etc..) * DFT DRC (spyglass) \nCompany Description Who We Are: Quest Global delivers world...
$177.9k - $284.7k
...functionality. Nextest engineering teams are characterized by deep technical skills working with both software and hardware. Our Engineers... ...software that directly interacts with hardware (FPGAs and ASICs)Knowledge of Windows and experience with Visual Studio requiredFamiliarity...Local areaRelocationFlexible hours$140k - $224.25k
NVIDIA is seeking a Senior Technical Sourcing Lead to help us build the strength of our Hardware... ...pool pipeline.Work with engineering leaders and recruiters in defining and maintaining... ...sourcing for building chip teams, specifically ASIC/Verification, VLSI (Physical Design,...Full time- Company: Tredence Inc.Position Title: Senior Technical LeaderLocation: 1900 Camden Ave., Suite 66, San Jose, CA 95124Position Responsibilities: Serve as the senior-most technical leader from Tredence within the GCP partner ecosystem for Data Engineering and Al solutions...Remote work
Do you want to receive more vacancies?
Subscribe and receive similar vacancies to ASIC DFT Technical Leader - CDC. Be the first to apply!
