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Staff Engineer, VLSI Design Engineering(Logic Design)

$72k - $108k

Vaia GmbH

Job Description Job Description Company Description Sandiskunderstands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we’re living in and that we have the power to shape. Sandiskmeets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibilityforward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globallyforinnovation, performance and quality. Sandiskhas two facilities recognized by the World EconomicForum as part of the Global Lighthouse Networkforadvanced 4IR innovations. These facilities were also recognized as Sustainability Lighthousesforbreakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world movingforward. Job Description The Memory Technology Group is at the core of the Legacy SanDisk Engineering Organization which Western Digital owns. We are building a cutting edge 3D memory in our multi-billion dollars Fab. Our memory provides performance, power, and endurance at a lower cost without forgoing quality. The Memory Technology organization is a strategic entity for the companyand we are constantly growing. Our group functions as a start-up within Western Digital, and offers a creative, fast paced, entrepreneurial work environment where you’ll be at the center ofinnovation. We are looking for an experienced Staff Engineer to lead and deliver projects for our Memory Design team. This is a great opportunity for a results-oriented, entrepreneurial individual who knows how to work with non-volatile memory world-class engineers andhas a great track record for delivering innovative results. You will need to think creatively about the memory as we do take pride in our craftsmanship. We do work together with all engineering teams to identify and execute on the most disciplined way. Your success will be measured by your ability to build great designs that deliver innovation that unlock revenue opportunities for the company. Join the Memory Technology Design Team and become a leader of this highly motivated, cooperative, and focused team! In this position, the individual will be responsible for all aspects of digital design in NAND Flash memory, focusing on micro architecture, RTL design, verification, logic synthesis, and timing analysis to deliver a design meeting target power, performance and area goals.

ESSENTIAL DUTIES AND RESPONSIBILITIES:

RTL design and verification in Verilog, RTL linting, clock domain crossing (CDC) analysis, design integration, synthesis, DFT, timing analysis and closure Balance design trade-offs with modularity, scalability, power, area, and performance. Interface with internal and external teams/customers to drive necessary technical specifications and features based on individual requirements Participating in Post-Si evaluation and debug Drive cross function support for productization Technical guidance and mentoring of junior engineers Qualifications

REQUIRED:

MSEE plus 5 years of relevant experience Experience with chip level integration, chip lead, and full product life cycle (requirements, design, implementation, test) of Logic design Working knowledge of the entire Logic design flow from RTL to GDSII (RTL coding, simulation, synthesis, static timing analysis, logic equivalence, DFT insertion, place-and-route, clock tree synthesis, extraction, static timing analysis, physical verification) Working knowledge of NAND flash memory cell device operations, algorithms for program/read/erase Excellent communication (written and verbal) and interpersonal skills

PREFERRED:

Experience developing digital circuit designs for low power operating conditions Working knowledge of device physics and process Working knowledge of NAND Flash memory design including Analog, Core, Datapath and IO circuits Proficiency with following Digital design tools Synthesis - Synopsys Design Compiler, Cadence Genus or Cadence RTL Compiler Static Timing - Synopsys Primetime or Cadence Tempus Place and Route - Synopsys ICC or Cadence Encounter or Innovus Familiarity with revision control tool and EDA standard formats used in cell/library development and modeling - Liberty (timing model), SDC (Synopsys Design Constraints) Programming experience in C, C++, Python or Perl The ideal individual must have proven ability to achieve results in a fast moving, dynamic environment. Self-motivated and self-directed, however, must have demonstrated ability to work well with people.A proven desire to work as a team member, both on the same team and outside of the team. Ability to troubleshoot and analyze complex problems. Ability to multi-task and meet deadlines. Excellent communication (written and verbal) and interpersonal skills. Additional Information Sandisk is committed to providing equal opportunities to all applicants and employees and will not discriminate against any applicant or employee based on their race, color, ancestry, religion (including religious dress and grooming standards), sex (including pregnancy, childbirth or related medical conditions, breastfeeding or related medical conditions), gender (including a person’s gender identity, gender expression, and gender-related appearance and behavior, whether or not stereotypically associated with the person’s assigned sex at birth), age, national origin, sexual orientation, medical condition, marital status (including domestic partnership status), physical disability, mental disability, medical condition, genetic information, protected medical and family care leave, Civil Air Patrol status, military and veteran status, or other legally protected characteristics. We also prohibit harassment of any individual on any of the characteristics listed above. Our non-discrimination policy applies to all aspects of employment. We comply with the laws and regulations set forth in the "Know Your Rights: Workplace Discrimination is Illegal" poster. Our pay transparency policy is available here. Sandisk thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution. Sandisk is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at View email address on click.appcast.io to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying.

#LI-KH1

Salary: USD 72000 - 108000 per year Experience: 5 years required #J-18808-Ljbffr Vaia GmbH

Vacancy posted 4 days ago
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