Power-Efficient AI Accelerator ASIC Engineer
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Google's AI and Infrastructure team in Sunnyvale is seeking an experienced ASIC Design Engineer to advance TPU technology and power-efficient silicon design for AI/ML workloads. You will model and drive power optimization, define low-power methodologies, and collaborate with software and system teams to implement power-management architectures that meet stringent power and performance goals.
#J-18808-LjbffrVacancy posted 1 day ago
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