Lead CPU Power-Management Verification Architect
SiFive
SiFive is seeking a Principal Design Verification Engineer to spearhead CPU-subsystem power-management verification across complex SoC environments, delivering data-center-grade signoff readiness. You will define architecture-aware verification strategies, drive cross-team collaboration with architecture, RTL, DV, and formal teams, and own risk-driven verification plans to ensure robust power-state transitions and clock/reset behavior. #J-18808-Ljbffr SiFive
Vacancy posted 1 day ago
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