Formal Verification Engineer — RTL, Proofs & Verification
$100k - $166.75kNVIDIA Gruppe
NVIDIA Gruppe is seeking a Formal Verification Engineer in Santa Clara, CA. The role involves formal verification of RTL units for chip designs, requiring strong analytical skills and knowledge of architectural details. Ideal candidates should hold a BS or MS in CS/CE/EE/Mathematics and have experience in formal methods and HDL tools like Verilog and SystemVerilog. A strong communication ability to collaborate effectively is also essential. The salary ranges from $100,000 to $166,750 for Level 1 and includes equity and benefits. #J-18808-Ljbffr NVIDIA Gruppe
Vacancy posted 4 days ago
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