Senior FPGA Design Engineer
Perceptive Innovations
Job Description
Successful applicant must be a U.S. Citizen with the ability to obtain a DoD Security Clearance
\n \nResponsibilities Include:
\nPerceptive Innovations is seeking a self-starting and experienced individual to be a leader and primary contributor in FPGA signal processing development and implementation for radio frequency (RF) and optical/thermal imaging systems.
\n- \n
- Design and implementation of FPGA-based digital signal processing systems \n
- Development of self-checking unit/system-level test benches and simulations \n
- Troubleshooting and resolving design issues \n
- Preparation of detailed design documentation and required reports to the government pertaining to the FPGA designs and implementations \n
- Independent time management of responsibilities, to include work planning and assignment, communication of status and code reviews, with a startup spirit and work ethic to get the job done within constrained timelines and funding \n
Qualifications
\nThe position requires RTL design, simulation, and implementation experience (VHDL primary, Verilog secondary) of challenging high performance FPGA embedded signal processing engines. The following skillsets are also required:
\n- \n
- Mastery of FPGA design flows such as Vitis/Vivado, Quartus Prime, Radiant, and Libero (synthesis, place & route, etc) in both TCL scripted and GUI methodologies. \n
- Experience with full development cycle of FPGA design and recent Xilinx experience with UltraScale+ devices, Zynq UltraScale+ MPSOC, and the latest Versal devices. \n
- Understanding of digital signal processing hardware architectures, and preferably experience with Xilinx/Avnet development boards, such as the VPK180, and FMC module interfacing. \n
- Experience with FPGA IP Core integration, preferably to include DDR memory interfaces, HDMI and Display Port Video interfaces, xGigabit Ethernet, SFP+, and USB3 designs. \n
- Familiarity with digital electronics hardware design \n
- Linux operating systems (including embedded) \n
- Strong understanding of software and hardware interaction, with experience in Xilinx SoC development with embedded multicore processors and FPGA hardware/software co-design \n
- Excellent verbal and written skills to interact with design teams, management and customers \n
- Other duties as assigned \n
- Minimum 5 years' (10+ desired) experience leading FPGA development \n
The Following Skillsets Are Desired
\n- \n
- Experience with SIGINT, EW, Communications, Radar, Lidar, and Image processing \n
- Experience with PicoBlaze, MicroBlaze and ARM Cortex A9 \n
- Bringing up Linux or RTOS on an FPGA SoC (e.g., Yocto) \n
- Working knowledge of lab equipment such as oscilloscopes, spectrum analyzers, signal sources, power supplies \n
- Use of Git, Subversion, or similar tools for codebase control in team environment \n
- Experience with local and cloud development practices in a CMMC environment \n
- Experience with Hardware design, PCB design, fabrication, and testing \n
- Experience with OpenVPX hardware development, Vita49, and Digital Receivers/Transmitters \n
- MATLAB/Simulink/Python modeling of signal processing systems, at a minimum able to understand a high level model and convert to an FPGA implementation \n
- Recent adaptation of LLM capabilities and agents in the design process \n
- High level language programming (C, C++), and ability to write simple embedded software modules for FPGA test purposes \n
- Experience with script languages (Tcl, Python, Perl, Ruby, etc.) \n
- A bachelor's degree in EE/CE/ECE is required; a master's degree is preferred. Preference will be given to applicants with prior relevant experience. \n
- Perceptive Innovations offers competitive pay in a relaxed and independent work environment, with a growing benefits package including excellent health insurance, annual bonus, and an early-stage startup incentive stock options plan. \n
- Perceptive Innovations is an equal opportunity employer. \n
- Successful applicant must be a U.S. Citizen with the ability to obtain a DoD Security Clearance \n
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