Power and Performance Attainment and Feature Enablement Lead

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THE ROLE:

As the Power and Performance Attainment and Feature Enablement Lead you will be expected to be a Cross Functional Technical Leader for Power and Performance (PnP) workstreams on your product, guiding it from PreSi Definition / Planning through Program End of Life. The role requires an unusual mix of technical breadth, problem solving, and soft collaboration skills. This is an ideal role for the ambitious engineer who: is passionate about the power and performance domain, desires to make impactful product decisions, and can thrive in a high-visibility role. Each week will bring new challenges and your ability to solve problems, be the voice for the customer, and to inspire others to solve problems will make a meaningful difference for the whole organization, final product AMD produces, as well as to the industry itself. Success requires driving complex cross functional technical decisions / tradeoffs while maintaining an even keel. You will need to learn as you go and mentor (and be mentored) along the way as well. When you read product reviews you will be able to see your fingerprints all over that product's successes and where you have opportunities to improve the next product.

KEY RESPONSIBILITIES

Lead teams to performance/watt attainment for Client products developing strategies for test, feature enablement, debug, analysis, & defect resolution throughout the course of a program. Work closely with the System and SoC Architects to set power and performance attainment objectives, define the features that get us to those goals. Develop methodologies to enable, integrate and optimize HW and SW power management features to maximize performance and user-experience across Client use cases. Drive Mission Mode PnP product bounding box attainment, definition of full product stack, and produce advisory data to customers on same. Provide relevant inputs to drive PnP teams in creation of strategies & test plans for product-specific performance/watt, features, and target market spaces as appropriate; identify risks & build mitigation plans. Drive the definition, enablement and integration of performance & power management features such as C-state and Pstate algorithms, IP Dynamic Power management, FW active power management algorithms, and thermal management. Lead cross-functional technical teams in the triage, debug and resolution of Power Management Feature and PnP issues. Engage with cross-functional leadership to integrate deliverables with project work streams. Ensure seamless enablement of PMM features from design through silicon validation, firmware integration, and system-level deployment. Feedback improvement areas to the various teams, including the power management architecture, IP, SoC, O/S, FW, and silicon enablement team Collaborate with other engineering teams on common program test & debug activities and process improvements.

PREFERRED TECHNICAL EXPERIENCE

Brings depth and expertise in product performance-per-watt attainment tradeoffs. Expert at tackling multi-variable problems via system level modeling, testing and characterization, trend analysis/projection, and model verification. Speaks SW not just HW - understand system-level power management trade-offs, both at HW and SW levels. Understands system-level thermal, power, frequency, and/or voltage limited workload behavior, and the impact of hardware design trade-offs on the limiters. Understands CPU core design and architecture at micro-architecture, L2/L3 cache design hierarchy, and core complex CCX-level. Understands physical design and RTL-level trade-offs to attained best performance-per-watt for product IP mix and variations. Understands CPU, GPU, Memory and NPU power/performance, SW power management, and system-level trade-offs. Strong analytical and debugging skills, with experience in root cause analysis for power/performance issues.

PREFERRED EXPERIENCE

Product development with hardware platforms and their software & firmware ecosystems. Experience in the PC architecture space and familiarity with hands-on system setup & testing and the care abouts for power and power and performance data collection hygiene. Direct technical experience on APU/CPU system performance analysis and micro-architectural power management. Proven ability to deliver large cross-functional technical deliverables. Experience working in a fast-paced matrixed technical organization and multi-site environment. Experience in SoC design, validation, or power optimization, with a focus on pre- and post-silicon power management

ACADEMIC CREDENTIALS

Bachelor’s Degree (BS) in Electrical Engineering, Computer Engineering, Computer Science or relevant discipline Location Austin, TX This role is not eligible for visa sponsorship.

#LI-JE1

Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy. #J-18808-Ljbffr Socket.dev