Physical Design Engineer - Static Timing Analysis

Salary: $136,000 - 212,800 per year Requirements:

• We look for experience in scripting or coding.
• We require a BS with 6+ years of experience, an MS with 4+ years, or a PhD with 2+ years in Electrical Engineering or Computer Science.
• We expect strong grounding in timing analysis fundamentals.
• We require 1+ years of experience performing static timing analysis.
• We require 1+ years of experience developing timing constraints.
• We need experience with timing analysis using EDA tools such as PrimeTime, Tempus, or similar tools.
• We expect understanding of ASIC physical design from RTL through GDSII.
• We require familiarity with other sign-off activities, including IR/EM, physical verification, and DFT.
• We require 1+ years of scripting experience with Tcl, Perl, or Python.
• Preferred: experience mentoring, leading, or coaching others.
• Preferred: experience building flows using STA tools such as PrimeTime or Tempus.
• Preferred: experience with ECO flows such as PT-DMSA, Tempus-ECO, or Tweaker.
• Preferred: experience working at advanced process nodes, 16nm or below.
• Preferred: experience with parasitic extraction tools such as STAR-RC or Quantus.
• Preferred: experience with circuit-level analysis using SPICE or SPECTRE.
• Preferred: experience with timing analysis for IO interfaces such as DDR, HBM, PCIe, or Die-to-Die.

• We develop and maintain block-level and full-chip static timing analysis flows.
• We write, debug, and validate timing constraints for blocks and full chips.
• We run static timing analysis and provide frequent feedback to teammates and leads.
• We advise on how to resolve timing issues, including generating ECOs and correcting constraint problems.
• We create scripts to automate timing-analysis runs and reporting.
• We collaborate closely with physical design engineers and RTL/architecture teams as a key member of our startup-like team.
• We provide leadership in applying new technologies to large-scale deployments.
• We continuously work to improve product performance, quality, and cost.

• AWS
• Cloud
• Hardware
• Support
• Machine Learning
• PCIe
• Perl
• Python
• Security
• SPICE
• EC2
• IoT

More:

We are part of AWS Utility Computing, supporting the development and management of Compute, Database, Storage, Internet of Things, Platform, and Productivity Apps services, including specialized security solutions for cloud customers. Our Cloud-Scale Machine Learning Acceleration team focuses on the design and optimization of hardware in our data centers, including AWS Inferentia, our machine learning inference product built for high performance at low cost. This is a fast-paced and intellectually demanding role where we collaborate with thought leaders across multiple technology areas and maintain exceptionally high standards. We offer a comprehensive benefits package that includes health coverage, 401(k) matching, paid time off, parental leave, and other support programs. The posted base salary range varies by location, including Cupertino, CA and Austin, TX.

last updated 37 week of 2026