Senior EDA Engineer, SOC Design Methodology

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's fueled by great technology—and amazing people. Today, we're tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what's never been done before takes vision, innovation, and the world's best talent. As an NVIDIAN, you'll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world.Our team develops the software that powers how NVIDIA's ASIC engineers design chips — building tools, automating flows, and co-developing with EDA vendors to push design methodology toward Speed of Light. We're a cross-functional team working across SoC design, RTL, and build infrastructure, and we're looking for an engineer who understands chip design well enough to know what's slowing it down — and can build the tools to fix it.What you'll be doing:Developing software to automate SoC design and build flows, enabling ASIC engineers to work faster and more reliably.Building new methodologies and tools in pursuit of ASIC design at Speed of Light (SOL).Partnering with design and verification engineers to support project execution and identify workflow gaps.Co-developing EDA tool capabilities with vendors to best serve NVIDIA's SOL needs.What we need to see:BS or MS in Electrical Engineering, Computer Engineering, or Computer Science (or equivalent experience).3+ years of EDA tool development experience in the ASIC or SoC design field.Hands-on experience with ASIC or SoC design and verification.Proficiency in Verilog or SystemVerilog.Strong programming skills in C++, Python, Perl, or Tcl.Solid understanding of computer algorithms and data structures.Ways to stand out from the crowd:Experience with SoC integration — IP connectivity, clock/reset automation, or top-level design flow.Familiarity with Synopsys Fusion Compiler or similar next-generation design tools.Hands-on use of agentic AI coding tools (Claude Code, Cursor, Copilot) in day-to-day development.NVIDIA offers highly competitive salaries and a comprehensive benefits package. We have some of the most brilliant and talented people in the world working for us and, due to unprecedented growth, our world-class engineering teams are growing fast. If you're a creative and autonomous engineer with real passion for technology, we want to hear from you.#LI-HybridYour base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4.You will also be eligible for equity and benefits.Applications for this job will be accepted at least until September 8, 2026.This posting is for an existing vacancy. NVIDIA uses AI tools in its recruiting processes.NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.SummaryLocation: US, CA, Santa ClaraType: Full time