Senior DDR5/DDR6 PHY Architect & Team Lead
Renesas Electronics
Renesas Electronics is seeking a Senior Analog Engineering Manager in Austin, Texas, to lead the development of DDR5 and next-generation DDR6 PHY solutions. The role involves managing a team to deliver high-performance DDR PHYs while ensuring compliance with industry standards. The ideal candidate should have over 12 years of experience in analog/mixed-signal IC design and strong leadership skills. This position emphasizes technical direction and team management to meet the demands of advanced memory interfaces. #J-18808-Ljbffr Renesas Electronics
Vacancy posted 3 days ago
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