Senior DSP RTL Design Engineer for High-Speed AI ASICs
Google Inc.
Google Inc. in Sunnyvale, CA is seeking a Senior ASIC Design Engineer, Digital Signal Processing, to shape AI/ML hardware acceleration and develop TPU architecture for high-speed silicon. You will own complex digital blocks, translate models into bit-exact implementations, and drive front-end flows for sign-off quality designs. The role emphasizes collaboration with verification teams and working across cutting-edge nodes to deliver scalable AI hardware. #J-18808-Ljbffr Google Inc.
Vacancy posted 1 day ago
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