Lead RTL Design Engineer — Hybrid High-Performance ASICs
$175k - $275kCerebras Systems
A leading AI hardware company in Sunnyvale, California is looking for a lead front-end design engineer. In this role, you will focus on chip design and collaboration with various teams to innovate semiconductor architectures. Ideal candidates will have over 10 years of experience in RTL design and a master's degree in computer science or electrical engineering. The company offers a competitive salary range of $175,000 to $275,000 annually along with a modern work culture. #J-18808-Ljbffr Cerebras Systems
- ...View, CA is seeking a Mid-level RTL Design Engineer to drive micro-architecture... ...definition and IP integration for an ASIC/subsystem. You will code in RTL languages, perform complex simulations, and... ...with a bias toward low-power and high-performance designs. Eligible for...Performance
- ...THE ROLE: You will contribute to the ASIC (chip) design for high-performance network chips: AINIC and DPU. As a... ...Physical Design teams, and product engineers to achieve first pass silicon success... ...design and implementationFront-end RTL design and integration of high-speed...Performance
$200k - $250k
Job Title: Principal RTL Design Engineer - PCIe / CXL / High-Speed SoCLocation: Santa Clara, CACompensation: $200K - $250K base DOE... ...instrumental in driving the design and delivery of high-performance ASICs that power industry-leading products for hyperscale and enterprise...Performance- Hybrid // Physical Design Engineer-ASICs, SoCs, VLSI Physical Design Engineer-ASICs, SoCs, VLSI Full time Sunnyvale... .... Placement & Optimization - Perform standard cell placement, legalization... ...CTS) - Design and optimize low-skew, high-performance clock networks . Routing...PerformanceFull time
- Apple is seeking an ASIC Design Engineer in the Pixel IP design team to deliver high-performance, low-power pixel processing engines for next-generation SoCs. In this front... ...you will write micro-architectural specs and RTL, collaborate with architecture, design and verification...PerformanceRelocation package
- ...cutting-edge silicon for high-performance GenAI. We seek a Physical Design CAD Engineer to own and evolve the CAD flow from RTL to GDSII, delivering performant... .... The role is hybrid, requiring three in-office... ...Mountain View, CA. You will lead back-end automation, tool...PerformanceWork at office
- Google Inc. in Sunnyvale, CA is seeking a Senior ASIC Design Engineer, Digital Signal Processing, to shape AI/ML hardware acceleration and develop TPU architecture for high-speed silicon. You will own complex digital blocks, translate models into bit-exact implementations...
$136k - $218.5k
...are looking for a Sr. ASIC Design Engineer! NVIDIA is seeking best... ...implement the world’s leading SoC's and GPU's. This position... ...fully verified, high performance, area and power efficient RTL to achieve the design targets... ...hear from you. #LI-Hybrid Your base salary...PerformanceFull timeWork experience placementRemote work- ...company in Cupertino is seeking an experienced ASIC/VLSI Design Engineer to design innovative communication systems. The... ...role involves collaboration with multiple teams, RTL coding, and optimization of design for performance. Candidates should have over 5 years in digital...Performance
$165k - $241.4k
...product development—from design to qualification to... ...unique experience for ASIC engineers by combining the resources... ...also do block level RTL design or block or top... ...a self-starter who is highly motivated and thrives... ...on sales plans earn performance-based incentive pay on...PerformanceFull timeTemporary workWork at officeLocal areaFlexible hours$175k - $275k
...deliver industry-leading training and... ...workloads with ultra high-speed inference... ...lead front-end design engineer, you will be a... ...expertise in RTL design and... ...delivering high-performance, power-efficient... ...management of external ASIC vendor. You... ....Can work in a hybrid work...Performance$150k - $250k
Job Title: Senior ASIC Design EngineerJob Location: Santa... ...: ASIC Design, RTL (Verilog/SystemVerilog... ...Microarchitecture, UCIe / Ethernet / High-Speed I/O, AI... ...skilled Senior ASIC Design Engineer to lead the design and... ...product specifications.Perform extensive verification...Performance$136k - $218.5k
...looking for a top-notch ASIC engineer to join the team. The... ...with the front design team to understand the... ...constraints.Improve Power, Performance, and Area (PPA) of innovative... ...topologies in RTL.Collaborate with Physical... ...for supporting high speed Clocking.Together...PerformanceFull timeWork experience placement$116k - $189.75k
We are now looking for an ASIC Design Efficiency Engineer! NVIDIA is seeking extraordinary... ...extend the state of the art performance and efficiency.Understand the... ...and deliver fully verified, high performance, area and power efficient RTL to achieve design targets.Collaborate...PerformanceFull time$138k - $197k
...small to medium size IP.Perform RTL coding, function/... ...degree in Electrical Engineering, Computer Engineering,... ...integration.Experience in ASIC development withVerilogor... ....Experience with ASIC design methodologies for... ...clocks/reset.Knowledge of high-performance and energy...PerformanceWorldwideNight shift$116k - $189.75k
...technology and dedication to excellence guide us. As an ASIC Design Engineer, you will build powerful SoC and GPU products.... ...microarchitecture documents and implementing high-performance, and area and power-efficient RTL to meet strictly defined development targets and...PerformanceFull timeWork experience placement$136k - $218.5k
...Coherent Interconnects Design Team, you will be... ...achieving timing, area, performance and power goals of... ...in Electrical Engineering, Computer Engineering... ...processor or other related high-performance... ...deep understanding of ASIC design flow including RTL design and verification...PerformanceFull time$163k - $236k
Lead the PCIe microarchitecture and RTL development, ensuring high-performance designs that strictly adhere to Power, Performance, and Area (... ...Bachelor's degree in Electrical Engineering, Computer Engineering,... ...experience.5 years of experience in ASIC design, including one...PerformanceWorldwide$168k - $264.5k
NVIDIA is seeking ASIC Design Engineers with experience in agentic AI to help design and implement the world's leading SoC's and GPU's. As part of NVIDIA's "AI for... ...help the ASIC team implement high performance, area and power efficient RTL to achieve design targets and...PerformanceFull timeWork experience placement$168k - $264.5k
We are now looking for a Senior ASIC Design Engineer.NVIDIA is seeking ASIC Design Engineers... ...to implement the world’s leading SoC's and GPU's. This position offers... ...implement, document and deliver high performance, area and power efficient RTL to achieve design targets and...PerformanceFull timeWork experience placement$168k - $264.5k
...are now looking for a Senior ASIC Design Engineer - DFX!NVIDIA has... ...related to cost, quality, and performance.What we need to see:Bachelors... ...experience in SoC architecture, RTL design, and verification.Strong... ...opportunity employer. As we highly value diversity in our current...PerformanceFull time$120k - $250k
...seeking silicon physical design engineers to join our team as... ...in-class silicon for high-performance and sustainable GenAI... ...key technologies in leading-edge process nodes.... ...fullchip designs from RTL to GDSIIOwn entire subsystems... ...experience in ASIC Physical DesignGreat...PerformanceFull timeWork experience placementLocal areaRemote workMonday to FridayFlexible hours$138k - $197k
...the TPU, writing high-quality, performant, and power-efficient RTL code primarily in... ...enhancement of internal design tools, flows, and... ...in Electrical Engineering, Computer Engineering... ...of experience in ASIC RTL design, with a... ...future of world-leading hyperscale computing...PerformanceWorldwide$140k - $229.8k
..., Inc.Job Area:Engineering Group, Engineering Group > ASICS EngineeringGeneral... ...Summary:As a leading technology... ...engineered for optimal performance and power... ...seeking Hardware Design engineers with... ...CA. This is a high-level, high-profile... ...system-verilog RTL design, Clock...PerformanceWork experience placementWork from home$163k - $237k
Lead the microarchitecture and RTL execution to deliver high-performance network design components which meet strict power, performance and area... ...'s degree in Electrical Engineering, Computer Engineering, Computer... ...in high-performance ASIC design.Experience architecting...PerformanceWorldwide- A leading tech company based in Sunnyvale, CA is seeking a PCIe Design Engineer to lead the design of high-performance ASICs for AI/ML hardware acceleration. The role involves RTL development, managing comprehensive documentation, and integrating subsystem functionality...Performance
- ...Corporation's HIPD team seeks a senior Logic design engineer to advance the UCIE PHY IP for datacenter/server designs. You will craft RTL, simulate, and contribute to architecture... ...convergence, and design optimization for performance, area, and reliability. Collaboration...Performance
- ## ASIC/VLSI Design EngineerAustin, Texas · Full-time####... ...VLSI Design Engineers/Micro-architects.As... ...opportunity to design highly sophisticated,... ...architecture definition*** **RTL coding (using... ...formal reviews.**Perform Synthesis and... .../MS in EE/CE from lead universities**Background...PerformanceFull time
- Google in Mountain View is seeking an experienced hardware design engineer to help shape the next generation of custom silicon. You will... ...IP, and contribute to chip-level verification, delivering high performance and energy efficiency for our consumer products. Candidates...Performance
$80 - $90 per hour
...major portions of the design and implementation... ...teams to achieve high quality design and... ...track record of ASIC design on several... ...Experience in Designing RTL block for an SOC.... ...clear and concise engineering documentation.... ...Engineer - High Performance Analog Milpitas, CA...PerformanceContract work
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