Senior RTL/ASIC Design Engineer — Microarchitecture & IP
Socket.dev
Google in Mountain View is seeking an experienced hardware design engineer to help shape the next generation of custom silicon. You will define microarchitecture, integrate IP, and contribute to chip-level verification, delivering high performance and energy efficiency for our consumer products. Candidates should have a bachelor’s degree in engineering or related field, 4 years IP development experience, and familiarity with Verilog/VHDL and scripting languages. #J-18808-Ljbffr Socket.dev
Vacancy posted 4 days ago
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