FPGA Design Engineer

Job Title

Requirements capture, decomposition, and traceability.

Develop RTL design code and simulation in VHDL, Verilog, and/or System Verilog.

Develop hardware test case, procedures and integration.

Define the verification strategy to be applied, such as on-hardware verification environment, test frameworks and test tools.

Perform ASIC/FPGA/SoPC verification using inspection, analysis, simulation, and test methods.

Ability to work with minimal supervision, as part of a team of engineers with a variety of skills and backgrounds, located throughout the world and matrixed into projects with aggressive schedules and frequent milestones.

Experience with processes and design assurance activities for ASIC, FPGA, and/or SoPC developments.

Familiarity with best practice chip-level verification techniques and languages (e.g. constrained random, functional coverage, code coverage, UVM, System Verilog).

Conduct and/or participate in peer reviews throughout product lifecycle.

Communicate well with a wide variety of individuals including Engineering, Program Management, internal leadership and customers.

Recommend new tools and practices for continuous improvement in the group’s ASIC/FPGA design flow.

Provide guidance or mentor other engineers with a variety of skills and backgrounds.