Search Results: 10,242 vacancies
TECHNOLOGY
Staff Design Verification Engineer: Master degree in EE, foreign degree equiv accepted; 12 mos work exp in design verification engrg; Proficient in SystemVerilog, SoS, Git, Linux & Microsoft Office; X'lnt problem-solving & comm skills. Highly-motivated team...
Suggested
...technology areas. If you are a hands-on DV Engineer with strong UVM skills and can be client... ...:
Responsible for all aspects of verification methodology and for ensuring the application... ....
Work and liaison with other Design Verification teams within our customer sites...
Suggested
Worldwide
...Position: design verification Engineer
Location: Mountain view, CA
Job Type: Fulltime/contract
Requirement For Performance DV
DV engineer with 5- 8 years of experience.
Traditional DV (SV/UVM )as well as performance...
Suggested
Full time
Contract work
...leadership for a geographically dispersed team of verification professionals in pre-silicon validation of highly complex SoC designs.
Contribute to the development and future... ...work with designers and other verification engineers to resolve issues.
Mentoring of junior DV...
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Holiday work
Work from home
Flexible hours
...detail? As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power... ...things they love with their devices.
The Graphics Design Verification Engineer will be responsible for the unit level pre-silicon RTL...
Suggested
Relocation
...Design Verification Lead
Santa Clara Valley (Cupertino),California,United States
Hardware
Are you a leader and want to apply your engineering background to make big things happen, and can you influence, connect, get results and communicate effectively while delivering...
Suggested
Relocation
...IPs, so that more people can enjoy AI technology closer.
Location: San Jose, CA, USA or Austin, TX, USA
Position: Design Verification Engineer
OPENEDGES is the world's only total memory system and AI platform IP solution company that has delivered NPU,...
Suggested
Holiday work
Night shift
...Design Verification Engineer
San Jose CA
JOB DESCRIPTION
Knowledge of SOCs with embedded ARM CPUs, DSPs, DDR3, peripherals and interconnect protocols such as AHB, AXI, PCI Express etc.
Strong HVL (UVM or SystemVerilog with OVM), C/C++, Perl, TCL programming...
Suggested
Remote job
...Synapse Design is looking forward to hire Design Verification Engineer expert.
Experience:: +10 years
Requirements:
Solid programming skills in C/C++, Verilog, System Verilog, UVM, assembly, Perl/Python.
Proficient in debugging complex SOC or CPU core...
Suggested
Night shift
Design Verification Engineer - Remote / San Jose, CA
Duration 6 months + (can be extended longer)
San Jose, CA / Remote
Design Verification Engineer
UVM
System Verilog
Test Bench Development
SystemC (preferred)
strong C/C++
Suggested
Remote job
...2.11 PHY and MAC standardExperience in debugging designs of IP level (Wi-Fi Baseband, and MAC) or SOC levelGood... ...:Work with system architects, algorithm engineers, and RTL designers to define Wi-Fi AP chip verification requirements.Architect and buildIP and system UVM...
Suggested
...At-least 8+ years of experience in System Verilog HVL.
At-least 8+ year of experience in UVM .
Experience in complete verification cycle which includes development of test plan, BFM/Driver/Monitor/Scoreboard component development and integration in test bench...
Suggested
Temporary work
Remote job
...Design Verification Engineer San Jose, CA
Acceler8 Talent is currently seeking a skilled Design Verification Engineer to join one of the world's leader in AI innovation, that specializes in the design of high-performance, low-power AI inference solutions.
You...
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...Urgent Hiring! Design Verification Engineer
Status: Active
I am delighted to connect with you on LinkedIn.
Im reaching out to see if youd be interested in a job opportunity that aligns with your career vision. Please let me know if you are available to discuss...
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Full time
Work experience placement
Immediate start
Remote job
Worldwide
Relocation
...particular emphasis on highly energy efficient design and new technologies that transform the... ...by a world-class vertically integrated engineering team spanning RF/Analog architecture... ...and integration, Emulation, Design Verification, Test and Validation, and FW/SW...
Suggested
Relocation
...role, you will be at the center of a chip design effort collaborating with all... ...based tests
Experience with advanced verification techniques such as formal and assertions... ...Description
As a CPU Verification Engineer owning the verification of a certain area...
Relocation
...A $100m+ VC backed RISC-V scale up are looking for multiple Verification Engineers as they continue to accelerate their growth this year!
They... ...specialist skillsets including
SoC, CPU, GPU, Physical Design, Form Logic, Fabric and PCIe
We are looking for proven...
Worldwide
...specializing in next-generation interconnect technologies designed for the future of HPC and AI applications. The company has... ...They are looking for a Senior/Principal ASIC Design Verification Engineer who is an expert with PCIe and CXL to help them accelerate...
...Senior ASIC Verification Engineer | AI Start-up | AI interference Solutions / Autonomous Driving | San Jose
Are you a Senior-level Verification... ...and tests to implement test plans.
Work closely with design and architecture teams to understand the functional and...
Remote job
Flexible hours
...Description
Job Description
Tarana Wireless is seeking to hire verification engineers to verify the world’s most powerful SoCs for broadband... ...next generation SoCs
Work with system architects, RTL designers, FPGA and emulation engineers to ensure that verification...
Flexible hours
