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$48 - $53 per hour
...Job Description Role: Firmware Validation Software Engineer Location: Palo Alto, CA Type: Contract to Hire Pay Range: $48-$53/hr. Mission: This will be part of the supercharger team and will be responsible for testing our EV charger features to...SuggestedContract workTemporary workCollabera
Palo Alto, CA5 days ago- ...6 months (strong possibility of extension based on performance) TOP MUST HAVE SKILLS: 1. Have experience bringing up or validating Memory interfaces (DDR4/DDR5, LPDDR4/5) 2. Have experience working in a lab environment using lab tools such as Oscilloscopes,...SuggestedNight shift
TPI Global Solutions
San Jose, CA6 days ago $181.1k - $318.4k
A leading technology company in San Francisco seeks a PHY Design Verification Engineer to join its wireless silicon development team. The role involves pre-silicon RTL verification of wireless PHY and its interfaces, requiring advanced knowledge in Verilog and SystemVerilog...SuggestedFull timeApple Inc.
San Francisco, CA21 days ago- A leading tech company is seeking an ASIC Design Verification Engineer I in San Francisco, CA. You will work collaboratively with a talented team on innovative communications and network processing silicon. Candidates should have recent or current Bachelors degree studies...SuggestedFull time
Cisco
San Francisco, CA9 days ago - ...A leading technology company in San Francisco is seeking a Senior ASIC Validation Engineer for its Blink/Ring ASIC team. This role involves defining architecture specifications based on product requirements and collaborating with teams to deliver high-quality RTL for...SuggestedFull time
Amazon
San Francisco, CA10 hours agonew - A leading technology company is seeking an ASIC Design Verification Engineer to optimize low latency SoCs for critical applications. The ideal candidate will have extensive experience in design verification, UVM, and a strong background in programming. In this role, you...SuggestedFull time
SQL Pager LLC
Sunnyvale, CA21 days ago - ...Job Description Core Responsibilities Execute comprehensive Hardware Validation testing for new silicon, focusing specifically on Battery Chain ICs and Power Management ICs (PMICs) . Develop, set up, and perform validation test plans for performance, reliability...Suggested
Intelliswift - An LTTS Company
Sunnyvale, CA3 days ago $55 per hour
...System Verification Engineer Location- Irvine, CA 92618 onsite rate- $55/hr Job descriptions: V&V Engineer (Verification & Validation Engineer), Matlab/Simulink Bachelor’s Engineering degree in computer science, or related field 9 plus years of...SuggestedRussell Tobin
Irvine, CA6 days ago- ...-aware simulations , low power checks , and work with UPF/CPF as needed Collaborate with DFT/PD/RTL teams and post-silicon validation to ensure design quality across domains Document test environments, testplans, and results for internal and external reviews...Suggested
Programmers.io
Sunnyvale, CA3 days ago $49 per hour
Job Description Job Description Yoh is looking for a Test Engineer to come in and join our Biotech/ Pharma client for their state of the art manufacturing building. The ideal individual will come in with Bachelor’s degree in Engineering: Mechanical, Electrical or Manufacturing...SuggestedContract workWorldwideYoh, A Day & Zimmermann Company
Pleasanton, CA1 day ago- ...tests in C,SV,UVM ○ Debug RTL and Gate simulations and work with design engineers to verify fixes. ○ Write diagnostics for validation of FPGA prototype (pre-tapeout) and ASIC. ○ Replicate silicon bugs in simulation environments and validate fixes or SW workarounds...Suggested
Mirafra Technologies
San Jose, CA7 days ago - ...aware simulations, perform low-power checks, and work with UPF/CPF as needed. Collaborate with DFT, PD, RTL, and post-silicon validation teams to ensure design quality across domains. Document test environments, test plans, and results for internal and external reviews...Suggested
Globex Digital
San Diego, CA5 days ago - About the Team OpenAIs Hardware organization develops silicon and system-level solutions designed for the unique demands of advanced AI workloads. The team is responsible for building the next generation of AI-native silicon while working closely with software and research...SuggestedFull time
OpenAI
San Francisco, CA21 days ago $126.8k - $190.9k
...architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Design Verification, Emulation, Test and Validation, and FW/SW engineering. Description In this highly visible role, you will be at the center of a silicon design group with a...SuggestedFull timeRelocationApple Inc.
San Francisco, CA21 days ago- San Francisco Bay Area, California, United States Hardware At Apple, we work every single day to craft products that enrich peoples lives. Do you love working on challenges that no one has solved yet and changing the game? We have an opportunity for an outstandingly...SuggestedFull timeWork experience placement
Apple Inc.
San Francisco, CA21 days ago - Our client is a world-leading technology company at the forefront of semiconductor innovation, powering some of the most advanced digital systems in the industry. Their work touches billions of users globally, driving nextgeneration performance and efficiency across highly...Full timeWorldwide
Quix Recruitment Group Ltd
San Francisco, CA21 days ago - Get AI-powered advice on this job and more exclusive features. Direct message the job poster from EDA CAREERS, (Technology Futures Inc). President at EDA-CAREERS and TECHNOLOGY FUTURES Inc. YOU MUST HAVE WORKING KNOWLEDGE OF EDA tools and Semiconductors! PLEASE...Full time
EDA CAREERS, (Technology Futures Inc).
San Francisco, CA21 days ago $190k - $265k
...utilization, reduce capital and power costs, and maximize data center efficiency. The companys solutions and value proposition have been validated by several leading hyperscalers. The company is led by a veteran team of Silicon Valley executives and engineers with decades...Full timeEridu AI
San Francisco, CA21 days ago- A leading technology company in San Francisco is seeking a highly skilled design verification engineer to ensure bug-free first silicon for new products. The role involves developing methodologies for verification, creating test plans, and utilizing advanced tools and ...Full time
Apple Inc.
San Francisco, CA21 days ago - ASIC Design Verification Engineer Client Overview Our client is building the first latency optimized SoC for their industry. Using its proven AI accelerator designs, we are targeting best in class latency with order of magnitude improvements for years to come. Low...Full timeNight shift
SQL Pager LLC
Sunnyvale, CA21 days ago - Title Design Verification Engineer Internal IP Location Bay Area (hybrid) or Toronto About the Company A fast-growing AI startup designing next-generation compute hardware. The company specializes in building high-performance IP blocks and accelerators...Full time
Amadeus Search
San Francisco, CA10 days ago $147.4k - $272.1k
San Francisco Bay Area, California, United States Hardware At Apple, we work every single day to craft products that enrich peoples lives. Do you love working on challenges that no one has solved yet and changing the game? We have an opportunity for an outstandingly...Full timeWork experience placementRelocationApple Inc.
San Francisco, CA12 days ago- ...verification using VHDL and/or Formal and have experience in providing classroom training and/or digital design or verification consulting services. ALL CANDIDATES MUST be enthusiastic and experience personal satisfaction when they have been able successfully transfer...Full time
EDA CAREERS, (Technology Futures Inc).
San Francisco, CA12 days ago - A leading technology company seeks a hardworking design verification engineer in San Francisco. This role includes developing test plans and methodologies to ensure bug-free silicon for cutting-edge products. Candidates should have a BS degree with at least 3 years of ...Full time
Apple Inc.
San Francisco, CA12 days ago $195k - $265k
...increase GPU utilization while simultaneously reducing capex and power. Eridu AIs solution and value proposition have been widely validated with several hyperscalers. Base pay range $195,000.00/yr - $265,000.00/yr Key Responsibilities Specialized Verification...Full timeEridu
San Francisco, CA16 days ago$140k - $225k
Tara Technical Solutions Recruiting for a Principal ASIC Verification Engineer role. Principal ASIC Verification Engineer San Jose Fulltime, direct hire with a Fortune 500 client. Pay range: $140,000 $225,000 per year (actual pay based on skills and experience...Full timeWork experience placementTara Technical Solutions (TTS)
San Francisco, CA8 days ago- ASIC Design Verification Engineer I (Full Time) United States Please note this posting is to advertise potential job opportunities. This exact role may not be open today but could open in the near future. When you apply, a Cisco representative may contact you directly...Full time
Cisco
San Francisco, CA9 days ago $140k - $225k
A leading technical solutions provider is recruiting for a Principal ASIC Verification Engineer in San Francisco. This full-time role with a Fortune 500 client requires substantial experience, including verifying designs and fluent knowledge of RTL verification methodologies...Full timeTara Technical Solutions (TTS)
San Francisco, CA8 days ago- ...Experience in design and implementation of manufacturing fixtures and tools. Experience with design and/or process verification, validation, and testing and implementing design control processes. Experience with process definition, sequence of operations, and human factors...Hourly payMonday to Friday
JBCPlatform
San Mateo, CA2 days ago - Job Description Job Description Position is located in Apple Valley CA. JOB SUMMARY Provides engineering support in a dynamic manufacturing environment. Draws on experience and engineering knowledge to resolve technical problems related to production. Interprets blueprints...Permanent employmentFull timeContract work
Tube Bending Technology, LLC
Victorville, CA16 hours ago
