Validation Engineering

Job Summary

The Silicon Validation Engineer will be responsible for executing silicon validation and characterization of high-performance, high-speed, low-power CMOS D2D and SERDES silicon interfaces following industry best practices. The role will focus on bringing up, validating, and characterizing high-speed D2D and SERDES interfaces across new and existing silicon chips.

Key Responsibilities

Bring up, validate, and characterize high-speed D2D and SERDES interfaces in new and existing silicon chips.

Perform bench software and hardware integration and establish validation test setups.

Develop test methods to evaluate performance and calculate operating margins of high-speed serial interfaces across various operating conditions.

Collaborate with design teams to improve testability and define test infrastructure logic.

Analyze test results and document findings to provide insights and recommendations.

Perform debugging and troubleshooting of silicon validation issues.

Develop comprehensive test reports and analyze boundary conditions.

Required Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field.
• 5+ years of experience working with D2D and SERDES platforms.
• Knowledge of high-speed D2D and SERDES architectures, including NRZ and PAM4, and related protocols.
• Experience with test and measurement equipment such as oscilloscopes, spectrum analyzers, and BERTs.
• Strong debugging and problem-solving skills.
• Experience with SERDES calibration and understanding of signal integrity.
• Familiarity with high-speed protocols such as UCIe, Ethernet, and PCIe.
• Ability to write comprehensive test reports and analyze boundary conditions.

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