Senior Photonics IC Layout & Tape-out Lead
Acceler8 Talent
Acceler8 Talent is seeking a senior Photonic IC Layout & Design Flow Engineer to own the PIC layout, verification, signoff and tape-out, connecting photonic designs with electronic IC development, packaging and silicon validation. You will establish and drive a Cadence Photonics workflow for GlobalFoundries’ 45 nm process, coordinate component designers, and ensure a complete, manufacturable PIC delivery from layout through tape-out. #J-18808-Ljbffr Acceler8 Talent
Vacancy posted 3 days ago
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