Lead High-Speed I/O Architect: PCIe, CXL, UA Link
Arm
Arm is seeking a High-Speed I/O Architect in San Jose, California, to define and design innovative on-chip interconnect architectures for scalable SoC platforms. This role includes responsibilities such as architecting high-speed interconnect subsystems like PCIe and CXL and collaborating with various teams to optimize performance and efficiency. The ideal candidate has over 8 years of experience in the field, deep expertise in protocols, and a strong educational background in engineering. The position offers a competitive salary range and a focus on collaboration and innovation. #J-18808-Ljbffr Arm
- Job Overview:At Arm, the High-Speed I/O Architect defines and designs innovative on-chip interconnect... ...interconnect subsystems—including PCIe, CXL, and UA Link—and define coherent and non-coherent... ...and core technology teams.Lead early architecture engagements with...SuggestedWork at officeLocal areaShift work
- TylSemi, Inc. in San Jose, CA seeks a High-Speed IO Architect to own the PCIe/UCIe/Ethernet interface architecture and drive tape-out readiness across multi-die chiplet platforms. You will define die-to-die integration, serdes-to-photonics interfaces, and SI budgets while...Suggested
$190k - $270k
CPO High Speed I/O and Photonics Design Architect Location: Sunnyvale, CA Base Pay Range $190,000.00/yr - $270,000.00/yr Job Description Define CPO product... .... Experience in developing photonics, including link budget analysis. Over 5 years of experience in semiconductor...Suggested- High-Speed IO Architect - PCIe/UCIe/Ethernet Subsystems The Role As the HSIO Architect, you will own the high-speed interface architecture across... ...integration, working directly with the Head of Engineering, digital leads, and analog teams. You will also serve as the technical...Suggested
- A leading technology company is seeking a CPO High Speed I/O and Photonics Design Architect in Sunnyvale, CA. This role involves defining product specifications and strategies for low power, high density CPO solutions, designing and analyzing systems, and ensuring optimal...Suggested
$175k - $350k
High-Speed IO Architect - Digital - PCIe/UCIe/Ethernet Subsystems TylSemi, Inc. San Jose, California, United States About this position About TylSemi,... ...working directly with the Head of Engineering, digital leads, and analog teams. You will also serve as the technical...Remote workShift work- ...Intel Corporation seeks a Principal SerDes Architect to lead analog/mixed-signal IP design in Santa Clara. You will drive architecture, define high-speed IO PHYs, and mentor technical leaders across Intel. Expect collaboration with multiple teams to optimize performance...
- ...in Sunnyvale is looking for an expert to develop Speed Adapter solutions that bridge high-speed I/O interfaces and facilitate system-level validation... ...enhancing the adoption of emerging protocols such as PCIe Gen7 and CXL 4.0. Your deep expertise in RTL design and...
$164k - $264.5k
...looking for an experienced PCIe Subsystem Architect to help define and deliver high-performance I/O architectures for next... ...candidate is a high-speed interfaces architect... ...across PCIe, CXL, Universal Chiplet Interconnect... ...implications, link training, latency, error...Work experience placementWork from home- ...next generation IOs, high speed memory (LPDDRx, gDDRx,... ...candidate has experience leading others in technical... ...System/Platform & SOC architects to translate system level... ...serial interfaces (PCIE, USB, …), parallel high... ...die-to-die/chip-to-chip links PHY IPsStrong...
$224k - $356.5k
...looking for a Senior I/O Architect for our NVLink... ...verificationProven experience over link layer architecture... ...interconnects (PCIE, UCIE, Chip to... ...protocols CHI/CXL/AXIAble to define... ...leading projects from concept... ...opportunity employer. As we highly value diversity in...Full time- TylSemi in San Jose is seeking a High-Speed IO Architect to lead the architecture of high-speed interfaces across product families. You will drive key... ...5 years of experience, including significant expertise in PCIe and UCIe standards, alongside a strong track record in...
$124k - $195.5k
...where everyone is inspired to do their best work.We're looking for a curious and driven Junior Interconnect Engineer to join our High-Speed Interconnect team onsite in Santa Clara, CA. This is a great opportunity to develop deep expertise in high-speed cable and connector...Full timeInternship- Qualcomm Technologies, Inc. is hiring a highly experienced Server IO specialist to architect and design end-to-end IO solutions, including PCIe and CXL technologies for datacenter SoCs. You will work with chip architects, IP design teams, and software stakeholders to optimize...
- Qualcomm is seeking a highly experienced Server IO specialist to architect and design end‑to‑end Server IO solutions, including PCIe, CXL, and emerging technologies for datacenter SoCs. The role involves collaboration with chip architects, IP design, performance and verification...
- ...Piper Companies is seeking a Principal Hardware Architect in the San Jose, CA area to lead architecture and design of high-speed, high-power networking boards and support ASIC bring-up. This onsite role calls for a senior electrical engineering leader who can guide complex...
- ...Qualcomm Technologies, Inc. seeks an experienced PCIe Subsystem Architect to define and deliver high-performance I/O architectures for next-generation AI products in... ...candidate will have deep expertise across PCIe, CXL, UCIe, NVMe, Ethernet and related datacenter connectivity...
- ...Design Technologies provides high-performance, ultra-low power... ...generation of ultra high-speed SerDes IP at 448G and beyond... ...We are seeking a Principal / Lead DSP & Systems Architect to own the architectural direction... ...will drive end-to-end link architecture, DSP algorithm...
- ...design to join their Serdes Technology Group. The role focuses on high-performance electrical and optical transceivers, with... ...Ph.D. in Electrical Engineering or relevant experience in high-speed transceiver design, along with a capability for collaboration and...Visa sponsorship
$177k - $387k
...role focused on early-phase system integrity architecture exploration. The ideal candidate will define architectural strategies for high-speed memory and system interfaces, perform feasibility analysis, and model channel characteristics. Key qualifications include a...$202k - $344k
...pathfinding and architecture exploration for next-generation memory modules and form factors. The role requires deep expertise in high-speed layout, SI/PI co-design, and advanced PCB technologies, with the ability to influence architecture through layout-driven modeling...- ...NVIDIA seeks a senior CPU architect to design high-performance server-class processors, bridging architecture, RTL, and physical design. You will influence power delivery, regulation, di/dt, and thermal strategies across the full stack from software to process. With...
$272k - $431.25k
...NVIDIA Gruppe in Santa Clara is seeking a seasoned architect specializing in CPU/GPU systems. The role involves developing innovative high-performance architectures and enhancing memory systems with a focus on energy efficiency. Candidates should have 18+ years of experience...- ...generation of supercomputing, high-performance computing, cloud... ...seeking an experienced SoC Architect to lead the architecture of next-... ...spans compute, memory, AI, high-speed I/O, power, clocking, and... ...high-speed SerDes, DDR PHYs, PCIe/CXL PHYs, clocking subsystems, power...
$184k - $287.5k
We are looking for a Senior GPU PCIe and Boot architect. NVIDIA is seeking outstanding engineers to design... ...and infrastructure for boot, PCIe/CXL enumeration, and capability discovery.... ...be an equal opportunity employer. As we highly value diversity in our current and future...Full time$220.2k - $330.4k
...team is developing High performance, Energy... ...experienced Signal Integrity Architect (individual... .... You will lead the definition, analysis... ...verification of SI for high-speed interconnects... ...SerDes standards (PCIe, CXL, USB, Ethernet, etc... ..., and PHY design/link analysis.Experience...Work experience placementWork from home- Arm is seeking a SoC Architect in San Jose, CA to design scalable architectures for high‑volume silicon across mobile, automotive, datacenter, networking, and IoT. You will collaborate with cross‑functional teams to deliver production‑quality IP, optimize performance and...
- Maxonic Inc. seeks an experienced Hardware Design Architect to lead architecture, design and development of high‑performance tester platforms in Milpitas, CA. You... ...and manufacturing release, with emphasis on high‑speed interfaces, SI/PI, power delivery, and thermal #J...
- ...is building hardware for frontier intelligence and is seeking a Global Supply Manager to own sourcing and supplier strategy for high-speed interconnects, including cables, connectors, backplane interfaces, and optical/electrical data interconnect solutions. You will build...
- ...The AI/ML ASIC Architect will lead the design and optimization... ...requires deep expertise in I/O subsystems,... ...to deliver scalable, high-performance solutions... ...architectures including PCIe, UCIe, CXL, and DMA engines.... ...Knowledge of high-speed networking (InfiniBand...
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