RTL Design Engineer — AI SoC (Hybrid)
Intel
Intel is seeking an experienced RTL Design Engineer in Folsom, California. This role involves developing logic designs and performing simulations for state-of-the-art AI SoC applications. The ideal candidate will have strong skills in Verilog/System Verilog and experience with ASIC/SoC development. The position offers a hybrid work model and exceptional benefits, including competitive pay and stock bonuses, as part of Intel's total compensation package. #J-18808-Ljbffr Intel
- ...Manufacturing Co is seeking an RTL Design Engineer in Folsom, California. In this... ...projects that push the boundaries of AI hardware. With 4+ years of experience in ASIC/SoC development, you will... ...rewards with competitive pay and a hybrid work model, fostering both on-site...Suggested
- Intel Corporation in Folsom, California, is seeking a Lead Senior Design Engineer to oversee the development of SoC designs for cutting-edge AI applications. The position requires expertise in RTL coding and strong collaboration with verification teams to ensure comprehensive...Suggested
$164.47k - $232.19k
Intel Corporation is looking for an RTL Design Engineer to develop RTL logic design and simulation for SoC and discrete designs. This role involves integrating IP blocks, defining architecture, and collaborating with various teams to ensure quality and compliance throughout...Suggested$164.47k - $232.19k
...Description: Join Intel's AI Revolution Intel's AI SoC organization develops cutting... .... If you are an engineer with strong technical and... ...hardware. What You’ll Do As an RTL Design Engineer, you’ll develop logic... ...will be eligible for our hybrid work model which allows...SuggestedLocal areaShift work$190.61k - $311.89k
## Lead Senior Design Engineer - AI SoC DevelopmentApplylocations: US, California, Folsom: US, Oregon,... ...logic design, register transfer level (RTL) coding, and simulation for SoC designs... ...Role**This role will be eligible for our hybrid work model which allows employees to...SuggestedLocal areaShift work$146k - $309k
...and advance faster than ever. As a SoC Physical Design Engineer in the Heterogeneous Integration Group... ...netlist to GDSII. You will work closely with RTL design, verification, DFT, IP providers... ...for their employment with Micron. AI alert : Candidates are encouraged to...Full timeLocal areaImmediate startNight shift$164.47k - $232.19k
Job Title RTL Design Engineer - AI SoC Responsibilities Develops RTL logic design, coding, and simulation for SoC and discrete component designs. Integrates IP blocks and subsystems into full chip SoC or discrete component designs. Defines architecture and micro‑architecture...Local area- ...hands‑on technical position focused on RTL build, IP integration, debugging,... ...Integration Group. Key Responsibilities Design and implement RTL for SoC‑level blocks and subsystems used in... ...multi‑functionally with Product Engineering, Test, Probe, Process Integration, and...Local areaNight shift
- ...a hands-on technical role focused on RTL build and IP integration in the Heterogeneous... ...Group. This position involves designing RTL for SoC-level components and collaborating with... ...bachelor’s or master’s degree in electrical engineering or a related field with a minimum of 1...
- As a SoC Design Engineer, you will be part of the Heterogeneous Integration Group (HIG), contributing to the design, development, and integration... ...targets. Key Responsibilities Design and implement RTL for SoC‑level blocks and subsystems used in HBM logic die. Integrate...Local areaNight shift
- Micron Technology is looking for a SoC Design Engineer in Folsom, California, to contribute to next-generation HBM SoC logic die development. The role involves designing and implementing RTL for SoC-level blocks, collaborating with multi-functional teams, and participating...
$146k - $309k
...HBM SoC Physical Design Engineer As a SoC Physical Design Engineer in the Heterogeneous Integration Group (HIG), you will drive the implementation... ...designs from netlist to GDSII. You will work closely with RTL design, verification, DFT, IP providers, packaging/assembly...Full timeLocal areaNight shift$122.44k - $232.19k
## Mixed Signal Logic Design EngineerApplylocations: US... ...register transfer level (RTL) coding, and simulation... ...correctness of features. Supports SoC customers to ensure high... ...Science or Computer Engineering or Electrical... ...GitHub CoPilot or any other AI experience.- Exposed to...InternshipLocal areaImmediate startShift work$141.91k - $269.1k
...Welcome!**.Senior CPU Core Physical Design Engineer page is loaded## Senior CPU... ...pushing forward fields like AI, analytics, and cloud-to-edge... ...implementation of custom CPU designs from RTL to GDS to create a design... ...role will be eligible for our hybrid work model which allows...InternshipLocal areaImmediate startShift work- Advanced Micro Devices, Inc. is seeking a talented engineer to research, design, and develop electronic components and systems for semiconductor manufacturing. The position involves leading ASIC development, determining architecture design, and collaborating with cross...
$177k - $334k
SoC Physical Design Engineer In the Heterogeneous Integration Group (HIG), the engineer drives advanced HBM SoC logic/base die implementations from netlist to GDSII, collaborating closely with RTL design, verification, DFT, IP providers, packaging/assembly, and manufacturing...Local areaNight shift- ...JR94197 Member of Technical Staff, AI‑Optimized Memory Digital Design Engineer / Microarchitect Our vision is to transform... ...with an ability to reason about SoC‑level behavior and tradeoffs.... ...features with a clear understanding of RTL cost and feasibility. A Masters or PhD...Local areaRelocation
$122.44k - $232.19k
Intel is looking for an experienced engineer in Folsom, California, to develop RTL design for mixed signal and high-speed IPs. The role requires collaboration across teams and offers significant responsibilities including architecture definition and IP integration support...- Dormont Manufacturing Co is seeking a qualified engineer to develop logic design and RTL coding for mixed signal and high-speed IPs. The role requires a strong understanding of analog and digital design principles and a collaborative mindset to work with diverse teams....
- ...generation computing experiences—from AI and data centers, to PCs,... ...and Responsibility Research, design, develop, and/or test... ...cross-functional teams including engineers to develop ASIC/layout design,... ...or UVM; C, C++, or Python; SoC, CPU, or GPU architecture; and...
- Dormont Manufacturing Co is seeking a CPU Physical Design Engineer in Folsom, CA, dedicated to developing next-gen CPUs for AI. You will implement physical design processes,... ...position offers a competitive salary and a hybrid work model, making it suitable for forward-...
$146k - $309k
Micron Technology, Inc is seeking a dedicated HBM SoC Physical Design Engineer in Folsom, California. You will drive advanced SoC logic designs and work alongside various teams to ensure robust implementations from netlist to GDSII. The ideal candidate will possess strong...Full time- Intel Corporation is seeking a Mixed Signal Logic Design Engineer in Folsom, California. The ideal candidate will develop RTL coding and logic design for mixed signal and high-speed IPs essential for chip integration. Candidates should possess a relevant degree and experience...
$105.65k - $200.34k
...Join Intel’s Graphics IP team as a GPU Design Verification Engineer, where you will play a pivotal role in... ...innovation across integrated, discrete, and AI‑enabled graphics platforms. Key... ...measures. Collaborate with architects, RTL developers, and physical design teams to...Local areaImmediate startWorldwideShift work- Intel Corporation is seeking a Silicon Design Automation Engineer in Folsom, CA, to support Foundry customers through installation and maintenance... ...tools and a degree in engineering. The position offers a hybrid work model and competitive compensation including stock bonuses...
- Dormont Manufacturing Co is seeking a Silicon Design Automation Engineer in Folsom, California. The role involves supporting EDA tools and methodologies... ...along with proven experience in design automation. A hybrid work model is available, providing flexibility in work...
$256.05k - $361.48k
...our customers. The Physical Design Integration Engineer performs physical design... ...of custom CPU designs from RTL to GDS to create a design database... ...Responsibilities Lead all SoC level physical design and... ...role will be eligible for our hybrid work model, allowing employees...Work experience placementLocal areaImmediate startFlexible hoursShift work$122.44k - $172.86k
...Impact: Join Intel's GPU Hardware Engineering organization and help validate... ...next generation of graphics, AI, and high-performance computing technologies. As a GPU Design Verification Engineer, you will... ...role will be eligible for our hybrid work model which allows employees...Full timeInternshipLocal areaImmediate startShift work- Micron Technology in Folsom, California is seeking a SoC Physical Design Engineer to drive advanced HBM SoC implementations from netlist to GDSII. You will collaborate closely with various teams to ensure optimal physical design and successful tapeout execution. The ideal...
- Advanced Micro Devices is seeking a SMTS Silicon Design Engineer in Folsom, California. The successful candidate will engage in designing and developing electronic components for semiconductor manufacturing, requiring innovation and collaboration. Applicants should hold...
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