ASIC Design Engineer: RTL & Microarchitecture, Equity
Jobleads-US
NVIDIA is seeking an ASIC Design Engineer in Santa Clara to build powerful SoC and GPU products. You will draft microarchitectures, implement RTL in Verilog, and drive verification across multiple IPs including GPU components.
The role requires 2+ years of RTL experience, strong Verilog skills, and proficiency in Perl/Python. You will collaborate with architects and verification teams to ensure high-performance, area- and power-efficient designs.
#J-18808-Ljbffr Jobleads-USVacancy posted 1 day ago
Similar jobs that could be interesting for youBased on the ASIC Design Engineer: RTL & Microarchitecture, Equity in Santa Clara, CA vacancy
$150k - $250k
Job Title: Senior ASIC Design EngineerJob Location: Santa Clara... ...: ASIC Design, RTL (Verilog/SystemVerilog), Microarchitecture, UCIe / Ethernet / High-... ...skilled Senior ASIC Design Engineer to lead the design and development... ...bonus, and early-stage equity grantComprehensive...Employment EquityCyberCoders
Santa Clara, CA23 hours ago$163k - $236k
...management and control subsystem's design microarchitecture specifications.Develop SystemVerilog RTL to implement logic for ASIC products according to... ...'s degree in Electrical Engineering, Computer Engineering,... ...USD) + 15% bonus target + equity + benefitsLearn more about...Employment EquityWorldwideGoogle
Sunnyvale, CA1 day ago$116k - $189.75k
...excellence guide us. As an ASIC Design Engineer, you will build powerful... ...you'll be doing: Drafting microarchitecture documents and implementing... ...area and power-efficient RTL to meet strictly defined development... ...will also be eligible for equity and benefits....Employment EquityWork experience placement$168k - $264.5k
We are now looking for a Senior ASIC Design Engineer.NVIDIA is seeking ASIC Design Engineers to implement... ...performance, area and power efficient RTL to achieve design targets and... ...Level 5.You will also be eligible for equity and benefits.Applications for this job...Employment EquityFull timeWork experience placementNvidia
Santa Clara, CA2 days ago- ...Corporation in Santa Clara, CA, seeks ASIC Design Engineers with experience in agentic AI to design... ...transform chip design. You will develop RTL in Verilog, verify designs, and build... ...a dynamic, globally distributed team. Equity and benefits are offered. #J-18808-Ljbffr...Employment Equity
$138k - $197k
...Bachelor's degree in Electrical Engineering, Computer Engineering,... ...~2 years of experience in ASIC RTL design, with a focus on clocking,... ...SystemVerilog for creating microarchitecture specifications and synthesizable... ...(USD) + 15% bonus target + equity + benefits Learn more...Employment EquityWorldwide- ...Google LLC is seeking an experienced SoC Design Engineer in Sunnyvale, CA to shape AI/ML hardware acceleration through RTL design and verification for TPUs. You will contribute... ...deliver high-performance, energy-efficient ASIC solutions. The role emphasizes cross-...Employment Equity
- ...NVIDIA Corporation is seeking an ASIC Design Engineer for our Santa Clara, CA team. You will implement... ...trade-offs, and deliver fully verified RTL designs meeting timing and power goals.... .... Level 3/4 salary ranges and equity are offered. #J-18808-Ljbffr Jobleads...Employment Equity
- ...Intel is seeking an experienced engineer to contribute to RTL design and microarchitecture of next-generation SoCs in Santa Clara. The role focuses on logic design, verification, and secure development within a fast-paced hardware environment. The candidate will collaborate...
$168k - $264.5k
...NVIDIA is seeking ASIC Design Engineers with experience in agentic AI to help design and implement... ...performance, area and power efficient RTL to achieve design targets and specifications... ...5. You will also be eligible for equity and benefits. Applications for this...Employment EquityWork experience placement- ...Cisco’s Silicon One team is seeking a Physical Design Engineer to lead RTL-to-GDSII implementation for cutting-edge Networking chips. You will optimize... ...-performance silicon. The role requires expertise in ASIC physical design concepts, floor planning, clock and power...
$200k - $299k
...The RoleAs a lead front-end design engineer, you will be a key part of the... ...role requires deep expertise in RTL design and integration, with... ...and management of external ASIC vendor. You will collaborate... ...compensation may include bonus and equity, and will be determined based...Employment EquityCerebras Systems
Sunnyvale, CA2 days ago$121.9k - $195k
...of delivering high-quality SystemVerilog RTL in advanced process nodes (5nm and below) and possesses a deep understanding of RTL Design, PPA optimization, clock domain crossing (... ...to receive not only a competitive new hire equity grant, but also annual equity awards, connecting...Employment EquityFull timeLocal areaBroadcom
San Jose, CA3 days ago- ...dedicated Software Developer on the Clocks team to design and enhance RTL-generation tools across NVIDIA products.... ...teamwork, strong C++ coding, and deep ASIC/Verilog RTL understanding. It offers a hybrid workplace with equity and benefits as part of the compensation package...Employment Equity
- ...Job Title: RTL Design Engineer Location: San Jose CA - onsite Position: Contract... ...functional building blocks of chips like ASICs, FPGAs, or SoCs. Key Responsibilities... ..., SystemVerilog, or VHDL. Microarchitecture Design: Plan how data flows between...Contract work
Lorven Technologies
San Jose, CA3 days ago $159k - $239k
...Category Engineering Hire Type Employee Job... ...industry-leading silicon design, IP, simulation... ...bring extensive ASIC digital design... ...delivering production RTL for complex... ...LPDDR PHY IP from microarchitecture through synthesis-... ...an annual bonus, equity, and other discretionary...Employment EquityRemote workWorldwide$138k - $198k
...verification of complex digital design blocks by fully understanding... ...and interacting with design engineers to identify important verification... ...AI/ML-driven systems.As an ASIC Design Verification Engineer,... ...00 (USD) + 15% bonus target + equity + benefitsLearn more about benefits...Employment EquityWorldwideGoogle
Sunnyvale, CA23 hours ago$163k - $236k
Verify RTL implementations against high-level architectural reference... ...(RNM) or SystemVerilog-AMS.Design, implement, and maintain... ...Bachelor's degree in Electrical Engineering, Computer Engineering, or a related... ...00 (USD) + 15% bonus target + equity + benefitsLearn more about...Employment EquityWorldwideGoogle
Sunnyvale, CA3 days ago- ...Normal Computing seeks an RTL Design Engineer to own digital logic from microarchitecture to tapeout. You will craft synthesizable SystemVerilog, work with verification on debug and coverage, and partner with physical design to meet timing and area constraints. This...
$167.7k - $245.2k
...grow. Because full product development—from design to qualification to production—is within... ....Your ImpactSet vision and strategy for ASIC verification methodology and execution... ..., not including incentive compensation*, equity, or benefits.Individual pay is determined...Employment EquityFull timeTemporary workLocal areaFlexible hoursCISCO Systems
San Jose, CA3 days ago$196k - $310.5k
...We are now looking for a Senior ASIC Floorplan Design Engineer! NVIDIA is seeking a talented ASIC Floorplan Engineer to design and implement the world... ...- 368,000 USD for Level 6. You will also be eligible for equity and benefits. Applications for this job will be...Employment EquityWork experience placement- ...Description Job Description Design Engineer Build the Next Generation... ...memory controllers, storage ASICs, or related semiconductor... ...design, SoC architecture, and RTL development. As part of... ...Doing Design and develop microarchitectures for high-performance, low-power...Ongoing contractLocal areaWork visa
CyberCoders
San Jose, CA10 days ago $167.7k - $245.2k
...grow. Because full product development—from design to qualification to production—is within... ...Impact Set vision and strategy for ASIC verification methodology and execution... ..., not including incentive compensation*, equity, or benefits. Individual pay is determined...Employment EquityFull timeTemporary workLocal areaFlexible hoursCisco
San Jose, CA23 hours ago$195k - $226k
...Job Description Job Description Staff ASIC/SoC Design Engineer Location: Santa Clara, CA | Candidates must currently reside... ...applications. You will have the opportunity to influence microarchitecture, optimize RTL for performance, power, and area, participate in chip...Full timeFlexible hoursCertified Employment Group
Santa Clara, CA16 days ago- ...shaping the future. Whether you’re designing next-gen processors, enabling AI breakthroughs... ...™, or EPYC™ CPU? Join AMD’s CPU engineering team and help shape the power... ...the full product lifecycle, from microarchitecture definition and RTL development through silicon bring-up...
AMD
Santa Clara, CA1 day ago $164.47k - $311.89k
...We work every single day to design and manufacture silicon products... ...accelerators. If you are an engineer with strong technical and... ...Responsibilities:Develop logic design, RTL coding, and simulation for... ...implement architecture and microarchitecture features for logic blocks....Full timeInternshipLocal areaImmediate startWorldwideShift workIntel
Santa Clara, CA2 days ago$163k - $236k
...Silicon SoCs.Define microarchitecture details for... ...Development.Drive RTL development, debug... ...degree in Electrical Engineering, Computer Engineering... ...with RTL design using Verilog/System... ...interconnects, and ASIC methodology.Preferred... ...5% bonus target + equity + benefitsLearn more...Employment EquityWorldwideGoogle
Mountain View, CA1 day ago$2,000 per month
...latency than a B200. With Etched ASICs, you can build products that... ...and staffed by leading engineers, Etched is redefining the infrastructure... .... Job Summary As an RTL Engineer at Etched, you will be... ...will develop and implement design verification strategies for both...Work experience placementWork at officeRelocation packageETCHED LLC
San Jose, CA23 hours ago$170k - $235k
...with the ultimate goal of enabling human life on Mars. SR. RTL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we’re leveraging our... ...firmware, architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing cutting...Permanent employmentTemporary workWorldwideWeekend workSPACE EXPLORATION TECHNOLOGIES CORP
Sunnyvale, CA23 hours ago- ...investment and is focused on innovative ASIC design and AI-native EDA systems.... ...thermodynamic hardware. Write synthesizable RTL in SystemVerilog for various blocks. Author... ...architecture to translate specifications into microarchitectures. Work with physical design on timing...
AnySilicon
Palo Alto, CA23 hours ago
Do you want to receive more vacancies?
Subscribe and receive similar vacancies to ASIC Design Engineer: RTL & Microarchitecture, Equity. Be the first to apply!
Related searches
- asic digital design engineer Santa Clara, CA
- ic design engineer Santa Clara, CA
- senior software design engineer Santa Clara, CA
- product design engineer Santa Clara, CA
- senior manager product engineering Santa Clara, CA
- senior product design engineer Santa Clara, CA
- senior asic design engineer Santa Clara, CA
- senior design verification engineer Santa Clara, CA
- sr. product engineer Santa Clara, CA
- new product engineer Santa Clara, CA