Senior DFT Engineer for SoC/ASIC: ATPG & MBIST
SoftPathTechnologies
SoftPathTechnologies is seeking a DFT Engineer in Santa Clara, CA with 7+ years of hands-on experience in DFT/ATPG for SoC/ASIC designs. The role demands strong understanding of controllability, observability, and scan-based testing, plus expertise in ATPG pattern generation, MBIST, and IO test methodologies. You will contribute to clock DFT, RTL fundamentals, and use industry-standard DFT/ATPG tools to drive robust test solutions. #J-18808-Ljbffr SoftPathTechnologies
Vacancy posted 2 days ago
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