Senior Low-Power SoC/ASIC Design Engineer
Qualcomm
A leading technology company based in Santa Clara, California is looking for an experienced ASIC Design Engineer to join their Integrated Wireless Technology team. As a key contributor, you will develop micro-architecture specifications and design low-power solutions within the full ASIC development cycle. Candidates should have significant experience in ASIC design, low power strategies, and silicon debug. This role offers a competitive salary and benefits package, reflecting Qualcomm's commitment to its employees. #J-18808-Ljbffr Qualcomm
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...group is looking for a top-notch ASIC engineer to join the team. The Team is... ...collaborates with the front design team to understand the... ...physical constraints.Improve Power, Performance, and Area (PPA)... ...information to GPU, CPU and SOC verification team, timing and...SeniorFull timeWork experience placement$196k - $310.5k
We are now looking for a Senior ASIC Floorplan Design Engineer!NVIDIA is seeking a talented ASIC Floorplan Engineer... ...and implement the world’s leading SoC's and GPU's. This position offers you... ...and tool development), chip floorplan, power/clock distribution, packaging, P&R...SeniorFull time$168k - $264.5k
We are now looking for a Senior ASIC Design Engineer to join our DFT team!NVIDIA has continuously reinvented... ...of DFT IPs for our next-generation SoC products. You’ll help drive innovation... ...as clocking, STA, place & route, and power optimizationExperience in post-silicon...SeniorFull time$168k - $264.5k
We are now looking for a Senior ASIC Design Engineer.NVIDIA is seeking ASIC Design Engineers to implement the world’s leading SoC's and GPU's. This position offers the opportunity to... ...and deliver high performance, area and power efficient RTL to achieve design targets...SeniorFull timeWork experience placement$216.2k - $394k
...ASIC Design Engineering Lead - SoC IP DMA In this highly visible, hands-on role, you will lead a team of... ...features, generate effort, area, and power estimates, and create bottoms-up project... ..., APB, etc.). ~ Understanding of low-power design techniques including clock...WorldwideRelocation$136k - $218.5k
The SCG Architecture team is hiring a Senior Power Integrity Co-Design Engineer to architect and deliver di/dt... ...Reliability, Circuit Design , Power-Arch, ASIC, and platform teams. You're the... ...rail, multi-domain PDN ownership at SoC level — die + package + board co-optimization...SeniorFull timeLive in- ...Sunnyvale is seeking a seasoned hardware design engineer to contribute to next-generation Pixel... ...across architecture, verification, power, and physical design. The role emphasizes... ...with 10+ years of hands-on experience in ASIC/SoC design, strong AMBA knowledge, and...Senior
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NVIDIA is seeking ASIC Design Engineers with experience in agentic AI to help design and implement the world's leading SoC's and GPU's. As part of NVIDIA's "AI for chip design" team,... ...team implement high performance, area and power efficient RTL to achieve design targets...SeniorFull timeWork experience placement$168k - $264.5k
...world.NVIDIA is seeking best-in-class ASIC Verification Engineers to verify the design and implementation of the world’s... ...with building block and SoC level testbench utilizing strong debugging... ...Verdi or equivalent)Background in UPF power verification is a plusExperience in...SeniorFull time- ...AI system solutions company, seeks a Sr ASIC engineer to lead microarchitecture and RTL implementation... ...with CPU/IP teams, drive timing closure, power optimization, and silicon validation,... ...third‑party IP to enable scalable, low‑power inference workloads in a dynamic startup...Senior
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...silicon micro-architects and design engineers to join our team as we... ...and maintain power estimation methodologies for AI accelerator SoCs.Build and calibrate energy... ...accelerator, GPU, networking ASIC, or high-performance... ....Experience with ASIC low-power design techniques...SeniorDaily paidFull timeWork experience placementWork at officeLocal areaRemote workMonday to FridayFlexible hours$150k - $250k
Job Title: Senior ASIC Design EngineerJob Location: Santa Clara, CA or Boston, MACompensation: $1... ...seeking a highly skilled Senior ASIC Design Engineer to lead the design and development of... ...including Microarchitecture and SOC designs.Collaborate with cross-functional...Senior$136k - $218.5k
...Cache Coherent Interconnects Design Team, you will be responsible... ...timing, area, performance and power goals of the on-chip interconnect... ...Master’s Degree in Electrical Engineering, Computer Engineering or... ...as is a deep understanding of ASIC design flow including RTL design...SeniorFull time
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