Sign up to access all features of our service.
  • Job search
  • Favorites
  • Create a CV
    New
  • Salaries
  • Subscriptions

Senior Physical Design Engineer - SoC & Low-Power

Qualcomm

Qualcomm Technologies, Inc. is seeking experienced Physical Design Engineers to contribute to cutting-edge SoC and ASIC projects across AI, mobile, automotive, data center and more. You will participate in floorplanning, CTS, low-power techniques, timing analysis, and automated design flows, collaborating with architecture and verification teams. The role emphasizes developing innovative PD methodologies, scripting tools, and sign-off readiness, with opportunities to work on multiple nodes and #J-18808-Ljbffr Qualcomm

Vacancy posted 1 day ago
Similar jobs that could be interesting for youBased on the Senior Physical Design Engineer - SoC & Low-Power in Santa Clara, CA vacancy
  • Qualcomm Technologies, Inc. in Santa Clara, California is seeking a Physical Design Engineer to contribute across ASIC/SoC projects, including floorplanning, CTS, and low-power strategies. The role involves executing the full physical design flow, collaborating with cross... 
    Senior

    QUALCOMM, Inc.

    Santa Clara, CA
    2 days ago
  •  ...in Santa Clara, California is looking for an experienced ASIC Design Engineer to join their Integrated Wireless Technology team. As a key...  ...you will develop micro-architecture specifications and design low-power solutions within the full ASIC development cycle. Candidates... 
    Senior

    Qualcomm

    Santa Clara, CA
    1 day ago
  • $150.4k - $277.6k

     ...SoC Physical Design Engineer - Power Delivery Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you... 
    Suggested
    Relocation

    Apple Inc.

    San Jose, CA
    1 day ago
  • $168k - $264.5k

     ...on the world.We are looking for a physical design engineer to be a part of NVIDIA’s physical...  ...GPU, CPU, Network processors and SOC, with emphasis on PPA (Power, Performance, Area) and runtime improvement...  ...on high performance and low power designs in advanced technology... 
    Senior
    Full time
    Remote work

    Nvidia

    Santa Clara, CA
    5 days ago
  • $136k - $218.5k

     ...the world.We are now looking for a motivated Senior Physical Design and Timing Engineer to join our dynamic and growing team. If you want...  ...design and timing of high-frequency and low-power NVIDIA CPUs, GPUs, LPUs and SoCs at block level, cluster level, and/or full chip... 
    Senior
    Full time

    Nvidia

    Santa Clara, CA
    2 days ago
  • $136k - $218.5k

     ...and intelligence.We are now looking for a motivated Senior ASIC Physical Design Engineer, Netlisting to join our dynamic and growing team....  ...You will drive physical design of high-frequency and low-power CPUs, GPUs, SoCs at block level, cluster level, and/or full chip... 
    Senior
    Full time
    Shift work

    Nvidia

    Santa Clara, CA
    6 days ago
  •  ...company, specializes in high-performance, low-power generative AI inference systems. With...  ...: Lead ASIC front-end physical design and engineering workflow development for generative AI...  ...experience with deep knowledge of VLSI/SoC chip physical design workflows. ~ Experience... 
    Senior
    Full time

    Anysilicon

    Sunnyvale, CA
    2 days ago
  • $138k - $206k

     ...technology solutions power the tools you use...  ...leader whose innovative designs are pushing the...  ...and software engineers to identify and address...  ...What You’ll DoOwn the physical implementation of...  ...centric computing IP and SoC partitions from RTL...  ...(SDC) development, low-power design (UPF/... 
    Senior
    Work at office
    Flexible hours
    Night shift

    Samsung Semiconductor

    San Jose, CA
    4 days ago
  • SPACE EXPLORATION TECHNOLOGIES CORP (SpaceX) in Sunnyvale, CA is looking for a Sr. SOC/ASIC Physical Design Engineer. The role involves developing cutting-edge silicon for deployment in space and improving physical design methodologies to enhance the Starlink network. Ideal... 
    Senior

    SPACE EXPLORATION TECHNOLOGIES CORP

    Sunnyvale, CA
    1 day ago
  • $170k - $230k

     ...Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering) Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is...  ...physical implementation steps (e.g. synthesis, floorplanning, power/ground grid generation, place and route, timing, noise,... 
    Senior
    Permanent employment
    Temporary work
    Worldwide
    Weekend work

    SPACE EXPLORATION TECHNOLOGIES CORP

    Sunnyvale, CA
    1 day ago
  • Qualcomm Technologies, Inc. in Santa Clara, CA is seeking talented Physical Design Engineers to join our growing SoC and ASIC Design organization. You will drive all stages of the physical design flow for high-performance ASICs/SoCs, including floorplanning, CTS, routing... 
    Senior

    QUALCOMM, Inc.

    Santa Clara, CA
    7 hours ago
  • $200k - $300k

     ...Overview We are looking for talented Design Verification Engineers to help verify and deliver Velaura’s next-generation Physical AI SoC. In this role, you will work closely witharchitects...  .... ~ Experience in understanding low power methodologies and verification criteria.... 
    Senior
    Flexible hours

    Velaura AI, Inc.

    Santa Clara, CA
    2 days ago
  •  ...Santa Clara, California is seeking Circuits Engineers to design state-of-the-art ASICs for high performance, low power SOCs. You will develop custom circuits, participate...  ...The role emphasizes power efficiency, device physics, and CAD automation, with opportunities to contribute... 

    Apple Inc.

    Santa Clara, CA
    1 day ago
  • $163k - $236k

    Design, deploy, and carry out post-layout low power verification methodologies according to execution schedules and...  ...Drive the resolution of complex Physical Design and Place & Route (P&R) anomalies...  ...Bachelor's degree in Electrical Engineering, Computer Engineering, or... 
    Worldwide

    Google

    Sunnyvale, CA
    4 days ago
  • $136k - $218.5k

    NVIDIA is looking for a Senior SOC Design Engineer to join our SOC Design team! At NVIDIA, you'll collaborate...  ...build cutting-edge GPUs and SOCs that power everything from AI to gaming! As a...  ...with experts in ASIC design, Physical design, CAD, Package Design, Software,... 
    Senior
    Full time

    Nvidia

    Santa Clara, CA
    5 days ago
  • $164.47k - $232.19k

     ...We work every single day to design and manufacture silicon products...  ...Role and Impact:As a GPU Physical Design Engineer, you will play a critical...  ...ensuring optimal performance, power, and area. You will be responsible...  ...challenges, including SoC integration and timing closure... 
    Senior
    Full time
    Internship
    Local area
    Immediate start
    Worldwide
    Shift work

    Intel

    Santa Clara, CA
    3 days ago
  • $168k - $264.5k

     ...are now looking for a motivated Senior Circuit Design Engineer to join our dynamic and growing Power Circuits Solutions Group. If...  ...addressing packaging, interconnect, physical design, electrical and thermal...  ...power delivery solutions for SoCs, including thermal constraints,... 
    Senior
    Full time

    Nvidia

    Santa Clara, CA
    5 days ago
  • $129.3k - $194.7k

     ...SoC Physical Design Engineer, PnR Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services...  ...physical synthesis, floor-planning, place and route (PnR), power grid, timing (STA), physical design verification (DRC/LVS)... 
    Internship
    Relocation

    Apple

    San Jose, CA
    2 days ago
  • $176.3k - $264.5k

    Company: Qualcomm Atheros, Inc. Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: Qualcomm-Atheros...  ...team you will be working on WiFi (802.11x) technology, SOC Design, Low Power micro-architecture, Power Intent/Implementation, power estimates... 
    Work experience placement
    Work from home

    Qualcomm

    Santa Clara, CA
    1 day ago
  • $200k - $220k

     ...Staff / Senior Staff Physical Design Engineer Bolt Graphics is a semiconductor startup based in Sunnyvale,...  ...critical role in achieving timing, power, and area (PPA) targets while ensuring...  ...withhigh-speed interfaces or complex SoCs (CPU/GPU/AI) Exposure toGLS and... 
    Senior
    Work at office

    Bolt Graphics

    Sunnyvale, CA
    2 days ago
  • $160k - $275k

     ...silicon micro-architects and design engineers to join our team as we...  ...and maintain power estimation methodologies for AI accelerator SoCs.Build and calibrate energy...  ...improvements.Work with physical design teams to evaluate...  ...design.Experience with ASIC low-power design techniques... 
    Senior
    Daily paid
    Full time
    Work experience placement
    Work at office
    Local area
    Remote work
    Monday to Friday
    Flexible hours

    MatX

    Mountain View, CA
    3 days ago
  • $66.42 - $71.42 per hour

     ...Job Overview: This is a Physical Design Engineering role that will require taking...  ...optimization for improved timing/power/area, and design cycle time...  ...topologies for high-speed, low-power applications....  ..., ISO 14001, ISO 27001, and SOC 2 Type II standards, reflecting... 
    Senior
    Temporary work
    Work experience placement
    Local area

    CYNET SYSTEMS

    Santa Clara, CA
    2 days ago
  • Apple Inc. is seeking a Physical Design Methodology CAD Engineer to design and optimize next-generation SoC flows in Santa Clara, CA. You will collaborate with cross-functional...  .... You will contribute to high-performance, power-efficient processor design through advanced PD... 
    Senior

    Apple Inc.

    Santa Clara, CA
    2 days ago
  • $163k - $236k

     ...GDS) implementation for high Power, Performance, and Area (PPA) designs.Manage full-chip level physical implementation.Define and implement...  ...'s degree in Electrical Engineering or equivalent practical...  ...block integration.Experience in low power design Implementation including... 
    Senior
    Worldwide

    Google

    Mountain View, CA
    4 days ago
  • $136k - $218.5k

     ...CPU Cache Coherent Interconnects Design Team, you will be responsible for the physical design of CPU on-chip interconnect...  ...timing, area, performance and power goals of the on-chip interconnect...  ...see:Master’s Degree in Electrical Engineering, Computer Engineering or Computer... 
    Senior
    Full time

    Nvidia

    Santa Clara, CA
    2 days ago
  •  ...believe technology has the power to solve the world’s most...  ...future. Whether you’re designing next-gen processors, enabling...  ...to advanced-node physical design for complex ASIC and SoC products, driving implementation...  ...technology, and product engineering teams, you will help... 
    Senior

    AMD

    Santa Clara, CA
    5 days ago
  • $163k - $236k

    Participate in the physical design of complex blocks.Contribute to the design and closure of the...  ...and external teams to achieve the best power/performance analysis (PPA). This...  ...qualifications:Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science... 
    Senior
    Worldwide

    Google

    Sunnyvale, CA
    3 days ago
  •  ...technology has the power to solve the world...  .... Whether you’re designing next-gen processors...  ...? Join AMD’s CPU engineering team and help shape...  ..., verification, physical design, firmware,...  ...processor architecture, low-power design, and...  ...for processors, SoCs, or complex IP... 

    AMD

    Santa Clara, CA
    4 days ago
  • $207k - $230k

     ...requirements. Discover more at As an Astera Labs STA Physical Design Engineer, Senior Principa l you will play a crucial role in driving the planning...  ...from RTL to GDS, ensuring robust signoff across complex SoCs or sub-systems. Identify RTL issues early and work with... 
    Senior
    Flexible hours

    Astera Labs

    San Jose, CA
    1 day ago
  • $205.74k - $251.46k

     ...market segment of chip design, including...  ...looking for hardware engineers who are passionate...  ...architecture of choice for SOC designs across a...  ...development. As a Power-Management/Reset/Clock...  .... Work with a physical implementation team...  ...with AMBA Low Power Protocol Interface... 
    Work experience placement
    Flexible hours

    SiFive, Inc.

    Santa Clara, CA
    1 day ago

Do you want to receive more vacancies?

Subscribe and receive similar vacancies to Senior Physical Design Engineer - SoC & Low-Power. Be the first to apply!