UVM Digital Verification Engineer

Overview Draper is an independent, nonprofit research and development company headquartered in Cambridge, MA. The 2,000+ employees of Draper tackle important national challenges with a promise of delivering successful and usable solutions. From military defense and space exploration to biomedical engineering, lives often depend on the solutions we provide. Our multidisciplinary teams of engineers and scientists work in a collaborative environment that inspires the cross‑fertilization of ideas necessary for true innovation. Responsibilities Design and simulate circuits at transistor level to implement architecture and requirement specifications. Contribute to system‑level design and optimize hardware designs for performance, power, and cost. Evaluate the hardware feasibility of complex algorithms and requirements. Contribute to complex chip architectures and designs. Develop and execute verification approaches, author verification plans, and apply formal analysis tools. Develop UVM agents for proprietary buses, instantiate VIPs for industry standard buses, and work in both block‑level and chip‑level UVM testbench environments. Work with RTL designers to resolve simulation issues, implement cover groups according to design requirements, and achieve code and functional coverage closures. Perform code reviews and mentor junior engineers. Perform or guide physical layout, including floor‑planning, and simulate circuits using extracted parasitics. Qualifications Proficiency in integrated circuit design and a strong understanding of integrated circuits, semiconductors, and general computer architecture. Ability to write detailed design specifications. Excellent verbal and written communication skills, mathematical skills, organizational skills, time‑management skills, and proven ability to meet deadlines. Strong analytical, problem‑solving, and prioritization skills. Fluent in SystemVerilog including SVA; recent experience with UVM/UVMF. Familiarity with at least one major industry simulator (QuestaSim, Xcelium, VCS) and at least one IEEE bus standard; experience with DDR3/DDR4, AMBA AXI protocols. Firm grasp of constrained‑random testing, coverage‑driven verification, and formal analysis. Experience with Python, Perl, Bash, or other scripting languages. Strong experience working in a Linux environment. Bachelor’s degree in Engineering or related field (master’s preferred) and 3‑5 years of experience with a bachelor's degree, or 0‑2 years with a master’s degree in Integrated Circuits or ASIC hardware engineering. Applicants selected for this position must obtain and maintain a government security clearance. Benefits and Compensation The US base salary range for this full‑time position is $75,000.00 – $156,000.00. The range reflects the minimum and maximum target salaries for the position across all US locations. Compensation details listed in US role postings reflect the base salary only and do not include bonuses or benefits. Draper supports programs to improve work‑life balance, including workplace flexibility, employee clubs, health and finance workshops, off‑site social events, and discounts to local museums and cultural activities. Equal Opportunity Statement Draper is committed to creating an inclusive environment. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, disability, age, sexual orientation, national origin, veteran status, or genetic information. Draper is committed to providing access, equal opportunity, and reasonable accommodation for individuals with disabilities. To request reasonable accommodation, please contact View email address on click.appcast.io. #J-18808-Ljbffr The Charles Stark Draper Laboratory, Inc.