Senior UVM Digital Verification Engineer

Overview Draper is an independent, nonprofit research and development company headquartered in Cambridge, MA. The 2,000+ employees of Draper tackle important national challenges with a promise of delivering successful and usable solutions. From military defense and space exploration to biomedical engineering, lives often depend on the solutions we provide. Our multidisciplinary teams of engineers and scientists work in a collaborative environment that inspires the cross‑fertilization of ideas necessary for true innovation. Job Description Summary Draper’s Digital Design Team is seeking a motivated and experienced Senior UVM Digital Verification Engineer to tackle novel verification challenges in FPGAs and ASICs. In this role, you will apply modern verification strategies to complex digital and mixed‑signal designs in the areas of embedded security, cryptography, signal and image processing, navigation and communications. Job Description Responsibilities Perform analysis approaches for a particular problem and independently execute assignments. Execute system engineering lifecycle assignments; concept and architecture design, integration, testing and operation. Drive solutions to complex problems with limited direction, contribute to task planning and test development, propose ways forward, and adapt appropriately to changes in program requirements. Lead small teams (fewer than five people), align team toward program goals and build trust within the team. Provide insight and suggest design modifications based on analysis outcomes, and apply analysis techniques across a range of technical challenges. Identify program/system‑level technical risks and develop and execute mitigation strategies for them. Actively mentor less experienced engineers and provide thoughtful, constructive feedback. Work in a collaborative multidisciplinary environment including stakeholders and external partners. Contribute to translation of requirements into technical and architectural decisions. Skills and Abilities Excellent mathematical, engineering, verbal and written communication, organizational and time‑management skills. Ability to collaborate within a diverse and multidisciplinary team. Demonstrated knowledge of multiple problem domains with the ability to quickly become knowledgeable in new domains. Identify and develop relevant modeling and analysis techniques, and develop or integrate multi‑domain qualitative models. Ability to present results that support system‑level analysis, performance trade‑offs, and decision‑making. Communicate technical concepts effectively with customers, engineers, managers, and other stakeholders of all relevant disciplines. Flexibility to multi‑task and adapt to evolving priorities. Education Bachelor’s degree in Aerospace, Electrical, Mechanical, or other relevant Engineering field. Master’s degree preferred. Experience 5-7 years experience in systems analysis or related field. Experience integrating descriptive modeling tools with other simulation tools. Additional Responsibilities Develop verification and test plans. Develop UVM agents for proprietary buses. Instantiate VIPs for industry standard buses. Work in both block‑level, chip‑level UVM testbench environments. Work with RTL designers to resolve simulation issues. Implement cover groups according to design requirements. Achieve code and functional coverage closures. Perform code reviews and mentor junior engineers. Fluent in SystemVerilog, including SVA. Recent experience with UVM/UVMF. Familiarity with at least one major industry simulator (QuestaSim, Xcelium, VCS). Familiarity with at least one IEEE bus standard; experience with DDR3/DDR4, AMBA AXI protocols. Firm grasp of constrained‑random testing and coverage‑driven verification. Experience with formal analysis. Practice using Python, Perl, Bash or other scripting languages. Ability to work in a Linux environment. Strong analysis and problem‑solving skills. Applicants selected for this position will have or be able to obtain and maintain a government security clearance. Location: Cambridge, Massachusetts 02139‑3563 US Base Salary Range: $82,300.00 – $220,000.00 Equal Opportunity Statement Draper is committed to creating an inclusive environment. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, disability, age, sexual orientation, national origin, veteran status, or genetic information. Draper is committed to providing access, equal opportunity, and reasonable accommodation for individuals with disabilities in employment, its services, programs, and activities. To request reasonable accommodation, please contact View email address on click.appcast.io. #J-18808-Ljbffr SwiftCruit