Senior RTL Design Engineer - CPU Frontend
$158.76k - $194.04kSiFive, Inc.
- # ****About SiFive*****As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFive’s unrivaled compute platforms are continuing to enable leading technology companies around the world to innovate, optimize and deliver the most advanced solutions of tomorrow across every market segment of chip design, including artificial intelligence, machine learning, automotive, data center, mobile, and consumer. With SiFive, the future of RISC-V has no limits.*At SiFive, we are always excited to connect with talented individuals, who are just as passionate about driving innovation and changing the world as we are. Our constant innovation and ongoing success is down to our amazing teams of incredibly talented people, who collaborate and support each other to come up with truly groundbreaking ideas and solutions. Solutions that will have a huge impact on people's lives; making the world a better place, one processor at a time. To learn more about SiFive’s phenomenal success and to see why we have won the GSA’s prestigious Most Respected Private Company Award (for the fourth time!), check out our and pages.**Job Description:****Responsibilities*** Architect, design and implement new features, performance improvements, and ISA extensions in RISC-V CPU core generators using Chisel.* Integrate new design content into SiFive’s Chisel/FIRRTL framework and contribute to improvements to that framework to enable automatic configuration/generation of documentation, verification testbenches and tests, and packaged software.* Perform initial sandbox verification, and work with the design verification team to create and execute thorough verification test plans.* Work with the physical implementation team to implement and optimize physical design to meet frequency, area, and power goals.* Collaborate with the performance modeling team for performance exploration and optimization to meet performance goals.* Microarchitecture development and specification. Ensure that knowledge is shared via great documentation and participation in a culture of collaborative design.**Requirements*** BS/MS degree in computer science, computer engineering, electrical engineering or related field, or equivalent experience.* 3+ years of design experience.* Academic or professional experience with CPU RTL design in one or more of the following areas: instruction fetch, instruction decode, branch prediction, coherent caches, cache prefetching, TLBs.* Proficiency in hardware (RTL) design in Verilog, System Verilog, or VHDL.* Strong software engineering skills/background, including: + Object-oriented, aspect-oriented, and particularly functional programming + Templated metaprogramming, in any language + Compiler infrastructures, particularly for domain-specific languages + Data modeling, particularly intermediate representations for optimizing or transforming compiler passes + Test-driven development, particularly ability to write adaptive unit tests* Attention to detail and a focus on high-quality design.* Ability to work well with others and share the belief that engineering is teamwork.**Nice-to-haves*** Experience with Scala/Chisel, Bluespec, or some other language/DSL for expressing configurable hardware via software.* Knowledge of RISC-V architecture.* Expertise in CPU processor designs in one or more of the following areas is a plus: instruction fetch; instruction decode; register renaming and instruction scheduling; vector units; load-store unit.* Knowledge of verification principles, testbenches, UVM, and coverage.* Experience with Git/Github, Jira, Confluence.**Pay & Benefits**Consistent with SiFive values and applicable law, we provide the following information to promote pay transparency and equity. We have a market-based pay structure which varies by location. Please note that the base pay range is a guideline, and our compensation range reflects the cost of labor in the U.S. geographic market based on the location of the role. Pay within these ranges varies and depends on job-related knowledge, skills, and relevant work experience. For candidates who receive and offer, the starting salary will vary based on various factors including, but not limited to, such qualifications as, skill level, competencies, and work location. The range provided may represent a candidate range and may not reflect the full range for an individual tenured employee.**Base Pay Range**$158,760.00-$194,040.00In addition to base pay, this role may be eligible for variable/ incentive compensation and/ or equity. In addition, this role is eligible for a comprehensive, competitive benefits package which may include healthcare and retirement plans, paid time off, and more!**Additional Information:**This position requires a successful background and reference checks and satisfactory proof of your right to work inUnited States of AmericaAny offer of employment for this position is also contingent on the Company verifying that you are a authorized for access to export-controlled technology under applicable export control laws or, if you are not already authorized, our ability to successfully obtain any necessary export license(s) or other approvals.SiFive is an equal opportunity employer. We celebrate diversity and are committed to creating an inclusive environment for all employees.As an E-Verify employer, we use this system to confirm the employment eligibility of all new hires in accordance with federal law. All applicants will be required to complete a Form I-9, Employment Eligibility Verification, upon hire. We do not use E-Verify to pre-screen job candidates and will comply with all E-Verify regulations.*California residents: please see our job candidate notice for more information on how we handle your personal information and your privacy rights:* *.*
- J-18808-Ljbffr SiFive, Inc.
Vacancy posted 1 day ago
Similar jobs that could be interesting for youBased on the Senior RTL Design Engineer - CPU Frontend in Santa Clara, CA vacancy
$100k
...role: As a member of the ASIC Design team, you will work closely with... ...for the logic design/RTL entry that meets the power, performance... ...8+ years of related technical engineering experience. 8+ years of... ...desirable Experience with on-chip CPU subsystem is a plus...SeniorFront endFull timeWork experience placementSummer internship- ...Responsibilities: • Architect, design and implement new features,... ...and ISA extensions in RISC-V CPU core generators. • Microarchitecture... ...• Proficiency with hardware (RTL) design in Verilog, System... ...with others and a belief that engineering is a team sport. • Knowledge...SeniorFull time
Baidu Usa
Sunnyvale, CA7 hours ago $167.1k - $250.7k
...Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > CPU Engineering General Summary:... ...are hiring talented engineers for CPU RTL development targeted for high performance... ...As a CPU Micro-architecture and RTL Design Engineer, you will work with chip...SuggestedWork experience placementWork from home$167.1k - $250.7k
A leading semiconductor company is looking for a CPU Micro-architecture and RTL Design Engineer in Santa Clara, California. This role involves the development of CPU RTL designs suitable for high-performance, low-power devices. The successful candidate should have a strong...Suggested$158.76k - $194.04k
...semiconductor company in Santa Clara is seeking a talented CPU Core Engineer to design and implement RISC-V CPU core features. You will work with... ...outcomes. The ideal candidate has a strong background in CPU RTL design, programming skills in relevant languages, and a...Front end- A leading technology company in Santa Clara is seeking a CPU Physical Design and Integration Engineer. In this role, you will contribute to the physical design and integration of high-performance processors, collaborating across teams to deliver innovative products rapidly...Senior
- A leading technology company in California is seeking a Senior Physical Design Integration Engineer to handle CPU design implementation and optimization. The role demands proven leadership skills and extensive experience in ASIC design, with at least 12 years of relevant...Senior
- GlobalFoundries is seeking a Senior Principal IP Design Engineer in Santa Clara to lead and own RTL development for efficient, low-power CPU cores. You will drive multiple micro-architecture strategies, ensuring performance and area optimizations while assisting in functional...Senior
$181.1k - $318.4k
...leading tech company in Santa Clara seeks an experienced engineer to drive CPU cache subsystem architecture and RTL development. The ideal candidate should have a... ..., with skills in Verilog or VHDL, and strong logic design principles. Benefits include competitive salary...Senior$181.1k - $318.4k
...leading technology company in Santa Clara is seeking an experienced CPU RTL Architect to drive architecture and RTL for high-performance... ...experience, specializing in microprocessor architecture and design principles. Responsibilities include micro-architecture specification...Senior$175k - $275k
...computation. About The RoleAs a lead front-end design engineer, you will be a key part of the world-... ...). This role requires deep expertise in RTL design and integration, with a strong... ...RDMA and Ethernet. ~ Knowledge of PCIe, CPU interfaces and Serdes technology. ~...Front endCerebras
Sunnyvale, CA4 days ago$136k - $218.5k
NVIDIA Corporation in Santa Clara seeks a Senior Logic Design Engineer to focus on designing and developing FPGA solutions. Responsibilities include... ...with architecture teams, writing high-quality RTL, and supporting system-level validation. The ideal candidate...Senior$140k - $170k
Credo is engineering the future of high-speed connectivity... ...Cables (AECs) all designed for maximum performance... ...About the Role As a Senior Physical Design Engineer... ...collaboration with the local frontend team and PD/... ...physical implementation from RTL to GDSII. Focus on...SeniorFront endLocal area$158.76k - $194.04k
...across every market segment of chip design, including artificial... ...*SiFive is looking for hardware engineers who are passionate about designing industry-leading CPU and interconnect IP to help drive... ...Reset/Clock Micro-Architect and RTL Design Engineer at SiFive, you will...Work experience placementFlexible hours$158.76k - $194.04k
The Role SiFive is looking for hardware engineers who are passionate about designing industry‑leading CPU and interconnect IP to help drive the tidal wave of adoption... ...Power‑Management/Reset/Clock Micro‑Architect and RTL Design Engineer you will be part of a team creating...- Advanced Micro Devices in San Jose, California is looking for a Senior ASIC Design Engineer. You will be responsible for the complete RTL design lifecycle for cutting-edge IP designs in a collaborative environment. Ideal candidates will have expertise in ASIC design, Verilog...Senior
- AMD is seeking a Senior ASIC Design Engineer to join their Silicon Design team in San Jose, California. You will be responsible for the complete RTL design lifecycle of cutting-edge embedded products, ensuring timing closure and managing complex IP design. The ideal candidate...Senior
- Advanced Micro Devices is seeking a Senior ASIC Design Engineer in San Jose, CA. In this role, you will be responsible for designing and developing... ...embedded products. You will oversee the complete RTL design lifecycle, ensuring high-quality delivery of production...Senior
- A leading semiconductor company is seeking a Senior ASIC Design Engineer to join their Silicon Design team in San Jose, CA. The ideal candidate will oversee the complete RTL design lifecycle for next-generation embedded products, ensuring design quality and timing closure...Senior
$110k - $300k
A leading technology company in San Jose is seeking an experienced ASIC/SoC Engineer to lead RTL design, simulation, and verification efforts. The ideal candidate will have a strong background in electrical engineering with expertise in RTL design, Verilog, and System Verilog...Senior- Etched.ai, Inc. in San Jose is seeking an RTL Engineer to ensure AI chip operations are efficient and correct. In this role, you'll develop design verification strategies for existing and upcoming ASIC designs, collaborate with architects, and work in a fast-paced environment...Senior
- ...you. What you’ll do: As a Persimmons RTL to PD Engineer, you will be responsible for high‑quality... ..., upf and static checks. Ensuring designs meet quality, performance, power & area... ...DFT, and verification teams to manage frontend‑to‑backend handoffs, enforce quality checks...Front endFlexible hours
- Samsung Electronics Perú is seeking a Senior Engineer in GPU RTL Design at our San Jose location. The role involves designing and developing complex RTL blocks for cutting-edge mobile GPUs, ensuring high-quality implementation and technical excellence. Ideal candidates...Senior
- Founding RTL Design Engineer / Member of Technical Staff Acceler8 Talent is partnering with an early-stage startup to hire an RTL Design Engineer... ...’ll Do Own AI-assisted RTL design flows end-to-end at the frontend level, including code generation and incorporation of...Front end
- A leading semiconductor company is seeking an RTL Design Engineer in San Jose, CA, or anywhere in the US. The role involves developing multi-protocol wireline transceivers and requires strong skills in logic design, RTL coding with Verilog/System Verilog, and collaboration...Senior
$160k - $220k
Delos Data is looking for an experienced Senior RTL Design Engineer in Palo Alto, California, to design and implement high-quality RTL for complex digital systems. The role involves translating architectural specifications and collaborating with cross-functional teams....Senior- Samsung Electronics Perú is hiring an Engineer for GPU RTL Design in San Jose, California. In this role, you will design complex RTL blocks for next-generation mobile GPUs, ensuring high-quality and robust designs through collaboration across teams. The ideal candidate...SeniorWorldwide
$188k - $325k
## Senior Principal IP Design EngineerApplylocations: Santa Claratime type: Full... ...are seeking an experienced CPU Micro architect. Responsible... ...Defining, leading and owning RTL development of a... ...Partner with a multi-functional engineering team to implement and validate...SeniorWork experience placementLocal area$181.1k - $318.4k
...the next groundbreaking Apple product!Apple’s Silicon Engineering Group (SEG) designs high-performance, low power microprocessors that... ...experienced engineer to help drive architecture and RTL for world-class CPU power management solutions. Description As a CPU RTL...Relocation$139k - $208.4k
...build with us! Role And Responsibilities We’re seeking a GPU RTL Design Engineer where you will work as part of a GPU IP design team. This is... ...driving the RTL design of various digital sub-blocks of GPU /CPU high performance digital designs Architectural through RTL...Front endHourly payFull timeRelocation
Do you want to receive more vacancies?
Subscribe and receive similar vacancies to Senior RTL Design Engineer - CPU Frontend. Be the first to apply!
Related searches
- senior software design engineer Santa Clara, CA
- data center design engineer Santa Clara, CA
- senior design verification engineer Santa Clara, CA
- soc design verification engineer Santa Clara, CA
- sr. product engineer Santa Clara, CA
- product engineering manager Santa Clara, CA
- digital design engineer Santa Clara, CA
- cad design engineer solidworks Santa Clara, CA
- director of product engineering Santa Clara, CA
- senior product design engineer Santa Clara, CA