Senior Principal PCIe/CXL Verification Engineer
Cadence Inc
Cadence is seeking an experienced engineer to advance PCIe AVIP and PCIe/CXL Virtual Bridge products. You will focus on protocol functionality, performance, and robustness across hardware and software boundaries. The role involves feature bring‑up, validation, debugging BFMs and transactors, and delivering customer-ready solutions in a high‑impact R&D team. Familiarity with emulation platforms is a strong plus. #J-18808-Ljbffr
Vacancy posted 3 days ago
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