Senior DFT Methodology Engineer
$168k - $264.5kJobleads-US
We are now looking for a Senior DFT Methodology Engineer! As a Senior DFT Methodology Engineer, you will architect and develop the test methodologies that make our next generation of silicon testable, debuggable, and secure from the very first bring-up. NVIDIA has crafted creative solutions for DFT architecture, verification, and post-silicon validation on some of the industry’s most complex semiconductor chips. This powerful technology changed modern computer graphics and parallel computing.NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can tackle, and that matter to the world. This is our life’s work, to amplify human imagination and intelligence. Make the choice to join us today. Design-for-Test Engineering at NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's most complex semiconductor chips.What you'll be doing:As a member in our team, you will own and work with cross functional teams, implementing state-of-the-art designs in test access mechanisms, I1149.1, I1500, I1687, 1838, memory BIST, memory dump and DFX security methodology.You will partner closely with timing, physical design, software, bring-up, and production teams to make the right trade-offs between cost and quality.In addition, you will help architect, develop and deploy DFT methodologies for our next generation products including RTL design, Verification, pattern generation, partnering with teams like timing, physical design, software, bringup, productionYou will also help mentor junior engineers on test designs and trade-offs including cost and quality.What we need to see:BS/MS Electrical or Computer Engineering (or equivalent experience) in related domain with proven DFT experience10+ years of hands-on experience in SoC architecture, RTL design, and verification.Strong analytical skills, with experience using vendor tools to verify and validate test patterns and logic on highly complex, multi-million-gate designs.Good exposure to cross functional areas including RTL & clocks design, STA, place-n-route and power, to ensure we are making the right trade-offsExperience in Silicon debug and bring-up on the ATE with an understanding of pattern formats, failure processing, and test program developmentExceptional written and oral interpersonal skills with the curiosity to work on rare challengesWays to Stand out from the Crowd:Knowledge of DFT security and hardware system security is a plus.Strong programming and scripting skills in Perl, Python, or TclProven track record of successfully deploying advanced DFT methodologies in groundbreaking semiconductor technologiesExperience mentoring engineers and driving methodology adoption across multiple product generationsStrong problem-solving skills and a proactive approach to overcoming technical challengesWhy Join Us? This is an opportunity to apply your DFT and SoC architecture expertise to some of the industry’s most complex and impactful semiconductor designs. At NVIDIA, your ideas will help shape energy-efficient compute platforms used by scientists, engineers, creators, and gamers around the world. You’ll grow alongside world-class engineering teams in a collaborative, fast-paced environment that values innovation, excellence, determination, and teamwork. We offer competitive compensation, comprehensive benefits, and meaningful opportunities to advance your career.#LI-HybridYour base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 168,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,500 USD for Level 5.You will also be eligible for equity and benefits.Applications for this job will be accepted at least until October 6, 2026.This posting is for an existing vacancy.NVIDIA uses AI tools in its recruiting processes.NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law. #J-18808-Ljbffr Jobleads-US
$168k - $264.5k
...choice to join us today.Design-for-X Engineering at NVIDIA works on groundbreaking innovations... ...chips.What you'll be doing:As a senior member in our team, you will work on innovating in the DFT Power, Thermal & Voltage Noise Methodology areas.This will include working on...SeniorFull time$168k - $310.5k
...We are now looking for a Senior DFT Methodology Engineer! As a Senior DFT Methodology Engineer, you will architect and develop the test methodologies that make our next generation of silicon testable, debuggable, and secure from the very first bring-up. NVIDIA has crafted...SeniorFull time- ...Job description Senior DFT EngineerMoTek Technologies has an immediate opening for a Senior DFT Engineer:The ideal candiate will be responsible for DFT flows and implementation... ...isolation of pattern failures ATPG methodology, Silicon bringup, and process yield...SeniorImmediate start
$136k - $218.5k
...choice to join us today.Design-for-Test Engineering at NVIDIA works on groundbreaking innovations... ...crafting creative solutions for DFT architecture, verification and post-silicon... ...addition, you will help develop and deploy DFT methodologies for our next generation products. You...SeniorFull time$136k - $218.5k
...people in the world. We are now looking for a motivated DFT-Timing Engineer to join our dynamic and growing team. If you want to challenge... ...such as Serdes, Processor, IO, SMVA, etc. Experience in methodology and/or workflow development. NVIDIA is widely considered...Senior$168k - $264.5k
...As a Senior DFT Engineer - Post-Silicon , you will take pioneering DFT capabilities beyond implementation—connecting silicon behavior, test... ...with clear metrics/what-if analysis. Define and improve methodologies for silicon bring-up, failure analysis, test-content...Senior$168k - $264.5k
...on the world. We want a skilled and motivated Implementation Methodology Engineer for NVIDIA's elite VLSI team. This role involves owning synthesis... ...flow optimization. Partner with architecture, RTL, DFT, physical build, and sign-off teams to surface PPA opportunities...Senior$120k - $220k
...Senior Design‑for‑Test Engineer Responsible for defining and implementing comprehensive Design‑for‑Test (DFT) strategies across complex digital SoC designs for 5G, IoT, and LEO satellite... ...Document DFT specifications, methodology guidelines, and test coverage reports...SeniorFull timeWork at officeVisa sponsorship- ...NVIDIA Corporation in Santa Clara, CA is seeking a Senior DFT Methodology Engineer to architect and develop test methodologies for next-generation silicon bring-up, validation and security. You will work with cross-functional teams to implement state-of-the-art DFT techniques...Senior
$168k - $264.5k
...teams with the smartest people in the world. Join us at the forefront of technological advancement. We are looking for a Senior Circuit Methodology Engineer that will work closely with Nvidia's circuit design engineering team in the area of infrastructure support as it...SeniorPermanent employmentWork experience placement- ...NVIDIA Corporation is seeking a DFT-Timing Engineer to drive timing analysis and closure for DFT logic across GPUs, CPUs, DPUs, LPUs, and SoCs. You will collaborate with PD, DFX, and Clocks teams to craft timing constraints, implement ECOs, and push for efficient convergence...Senior
$136k - $218.5k
...excited to architect and build the automation infrastructure behind next-generation silicon design? We’re seeking a Senior VLSI Library Methodology Engineer to join our team and drive the development, specification, and implementation of scalable systems. These systems...Senior$163k - $236k
...qualifications:Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science,... ...ASICs. You will develop static timing methodologies, margins, automation scripts, and write... ...with architecture, logic design, and DFT teams to understand and implement their...SeniorFull timeWorldwide$196k - $310.5k
...inspired to do their best work. Come join the team and see how you can make a lasting impact on the world. Senior Power Integrity Methodology CAD Engineer What you’ll be doing: Developing physical design methodologies for rail analysis and signoff. Responsible...SeniorShift work$168k - $264.5k
...improve timing convergence flows working with methodology teams. Develop timing models and... ..., timing and power convergence, DFT, as well as ECO implementation. What... ...equivalent experience) in Electrical or Computer Engineering 6+ years of experience for Masters and 8...Senior- ...Sunnyvale, CA, USA is seeking a Static Timing Engineer to lead the timing closure for high-... ...with architecture, logic design, and DFT teams to meet tight performance and power... ...work on advanced technology nodes, develop methodologies, and evaluate vendors/tools. In-person...Senior
$144k - $230k
...We are seeking a highly skilled Senior Failure Analysis (FA) Engineer to drive die-level logic fault localization... ...closely with our Design, Test, and DFT teams to identify root causes of... ...and electrical fault isolation methodologies. ATE Testing & Debugging: Utilize...Senior- ...Delos Data Inc., based in Silicon Valley with a mix of remote and on-site work, seeks a Senior DFT Verification Engineer to build robust verification environments for ASIC DFT logic. You will drive coverage-driven verification, collaborate with DFT and manufacturing teams...SeniorRemote job
- ...NVIDIA Corporation in Santa Clara, CA, seeks an Implementation Methodology Engineer for its elite VLSI team to own RTL2GDS methodology and drive... ...lead cross-functional collaboration with architecture, RTL, DFT, physical build, and sign-off teams, building automation in Python...Senior
$168k - $258.75k
...NVIDIA is seeking a highly skilled Senior PCB Library Engineer to own the development, validation, and... ...quality. Apply strong DFM, DFA, and DFT principles to all library... ...development procedures, and quality control methodologies. Support advanced technologies including...Senior$120k - $220k
...will expand global economies, protect space and our planet and enhance our overall quality of life. We are seeking a Senior STA Methodology Engineer to join our ASIC design team. In this role, you will own cross-functional timing methodology efforts across multiple...SeniorFull timeWork at officeImmediate startVisa sponsorshipNight shift$152k - $253k
...We are looking to hire a System Test Engineer who will work in the test solutions group... ...introduce new manufacturing test technology and methodology to improve production efficiency.... ...software. Review and provide feedback for DFT in the early design stages. Debug...SeniorContract work- ...Our client is seeking a Senior ASIC Verification Engineer to join their team. As a Senior ASIC Verification... ...organization supporting the DFT and ASIC verification efforts for next... ...models; drive scan-based diagnosis methodology for silicon failure debug; and support...SeniorWeekly payTemporary workFor contractorsImmediate startRelocationFlexible hours
$121.9k - $195k
...Core Switching Group division is seeking a candidate for a DFT engineer. Products include networking switches for Scale up and Scale... ...Lithography, Etch, Deposition, CMP, Implant), and electrical testing methodologies. Knowledge of Testability techniques and features (SCAN,...Local areaShift work$168k - $264.5k
...are now looking for a highly motivated and self-starting Senior Circuit Design Engineer to join our dynamic and growing team. If you are... ...Matlab/Simulink, etc. Familiarity with design-for-test (DFT) methodology. Experience with scripting languages and automation...Senior$152k - $253k
...are looking to hire a Hardware Systems Engineer who will work in the test solutions group... ...introduce new manufacturing test technology and methodology to improve production efficiency.... .... Review and provide feedback for DFT in the early design stages. Debug complex...SeniorContract work- ...As a Senior NPI / Process Engineer , you will serve as the Subject Matter Expert (SME) for PCB manufacturing and electronic assembly processes... ...deep expertise in process engineering, Six Sigma/Lean methodologies, and New Product Introduction (NPI). You will drive continuous...SeniorRemote work
- ...NVIDIA is seeking a Senior Signal Integrity Engineer to join our Packaging and Systems team. You will lead high-speed SerDes channel design, simulation... ..., board, mechanical, and validation teams, drive SI methodologies, and translate measurement findings into reusable...Senior
$105.5k - $213.5k
...Senior PCB Layout EngineerThis role has been designed as ‘’Onsite’ with an expectation... .... Responsibilities: Designs engineering solutions for electrical and electronic... ...empirical analysis, modeling and testing methodologies to validate component, circuit, and hardware...SeniorWork experience placementWork at officeLocal areaImmediate start- ...searching for an experienced Signal Integrity Engineer to own the high-speed channel design of... ...on our team. About the Role As a Senior Signal Integrity Engineer, you'll be the... ...doesn't close. You'll also shape the methodology and design rules the rest of the SI team...SeniorWork at office
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