Sign up to access all features of our service.
  • Job search
  • Favorites
  • Create a CV
    New
  • Salaries
  • Subscriptions

Senior LPU ASIC Engineer

$136k - $218.5k

NVIDIA

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world.Join NVIDIA and become part of a team advancing the frontiers of AI technology! As we lead innovation in AI and accelerated computing, we seek a Senior LPU ASIC Engineer to contribute to our outstanding progress in chip design. At NVIDIA, you’ll collaborate with extraordinary talent and thrive in an environment that values diversity, collaboration, and remarkable accomplishments.What you'll be doing:In the role of a Senior LPU ASIC Engineer, you will play a crucial role in our innovative LPU chip design.Full-Flow Ownership: Responsible for Synthesis, floorplanning, place & route, timing constraints, UPF and LEC at the block/partition level and top level.Cross-Functional Optimization: Partner with IP, Front-End logic design and Architecture teams to streamline IP integration, drive PPA (Power, Performance, Area) optimizations, resolving architectural bottlenecks to enable efficient physical implementation.Tapeout Execution: Lead design closure in collaboration with IP, PnR, Sign-off teams, ensuring 100% verification compliance for successful GDSII handoff and tapeout.Methodology Innovation: Architect data-driven EDA flows and methodologies in collaboration with CAD teams, implementing automated enhancements that measurably improve PPA and design cycle efficiency.What we need to see:B.S. in Electrical/Computer Engineering or equivalent experience (M.S./Ph.D. preferred) with 5+ years of industry experience delivering full-flow physical design for large-scale, high-performance SoCs at advanced process nodes.Full-Flow Execution: Proven track record of driving designs through the complete RTL-to-GDSII flow, including synthesis, placement, CTS, routing, extraction, and physical/electrical verification.Low-Power Expertise: Deep understanding of low-power design intent (UPF/CPF), formal equivalency checks (LEC), and rule verification for complex multi-voltage domain architectures.Clock & Timing Mastery: Expert-level proficiency in advanced CTS methodologies, clock tree synthesis, and sign-off timing analysis (MCMM STA) using complex constraints.PPA Optimization: Demonstrated ability to implement aggressive power, performance and area optimization techniques, and identify reduction opportunities across the entire physical design cycle.Sign-off & Integrity: Strong command of power grid design, EMIR analysis, and ECO generation to ensure robust silicon integrity and timing closure.DFT & Block-Level Integration: Skilled in employing best-known methods to optimize and handle DFT structures within block-level physical design implementations.EDA Tool Proficiency: Expert-level command of industry-standard tool suites for end-to-end physical design flows.Automation & Innovation: Proficient in scripting (TCL, Python, Perl) to automate flows, with a forward-looking ability to integrate AI-driven optimizations for enhanced design efficiency.High-Speed IP Integration: Specialized experience in the physical design of blocks and partitions containing high-speed SerDes IPs, such as PCIe, CXL, C2C, and Die-to-Die interfaces a plus.Widely considered to be one of the technology world’s most desirable employers, NVIDIA offers highly competitive salaries and a comprehensive benefits package. As you plan your future, see what we can offer to you and your family #LI-HybridYour base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4.You will also be eligible for equity and benefits.Applications for this job will be accepted at least until June 8, 2026.This posting is for an existing vacancy. NVIDIA uses AI tools in its recruiting processes.NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.SummaryLocation: US, CA, Remote; US, NC, Remote; US, OR, Remote; US, AZ, Remote; US, CA, Santa Clara; US, MA, RemoteType: Full time

Vacancy posted 2 days ago
Similar jobs that could be interesting for youBased on the Senior LPU ASIC Engineer in Santa Clara, CA vacancy
  • $136k - $218.5k

     ...lasting impact on the world.We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want to...  ...domain specific STA and timing convergence, such as GPUs, CPUs, LPU or SOCsBackground in logic synthesis and equivalence checking... 
    Senior
    Full time

    Nvidia

    Santa Clara, CA
    1 day ago
  • $196k - $310.5k

    NVIDIA is now looking for a Senior Power Integrity Engineer to join our LPU Packaging team!NVIDIA has been transforming computer graphics, PC gaming, and accelerated...  ...high-current, low-voltage rails within large GPUs, ASICs, or CPUsProven ownership of the chip-package-board PDN... 
    Senior
    Full time
    Work experience placement

    Nvidia

    Santa Clara, CA
    2 days ago
  • $180k - $230k

    Job description: Our client, a cutting-edge developer of custom ASICs and SoCs for emerging technologies, is seeking a Senior ASIC Design Engineer to join their growing team in San Jose. This role is ideal for engineers with stable work histories, strong customer-facing... 
    Senior

    Affinity Executive Search

    San Jose, CA
    2 days ago
  • $168k - $264.5k

     ...a lasting impact on the world.NVIDIA is now looking for a Senior Signal Integrity Engineer to join our Packaging and Systems team! In this role, you...  ...improve model accuracy and signoff confidenceWork closely with ASIC, package, board, mechanical, thermal, and validation teams... 
    Senior
    Full time

    Nvidia

    Santa Clara, CA
    10 hours ago
  • $136k - $218.5k

    We are now looking for a Senior ASIC Power Engineer!NVIDIA is seeking extraordinary power engineers to design hardware accelerators and processors on our next-generation mobile, embedded and datacenter platforms. This position offers the opportunity to have real impact... 
    Senior
    Full time

    Nvidia

    Santa Clara, CA
    1 day ago
  • $150k - $250k

    Job Title: Senior ASIC Verification EngineerJob Location: Santa Clara, CA or Boston, MACompensation: $150K - $250K base DOE plus equityRequirements...  ...are seeking a highly skilled Senior ASIC Verification Engineer to join our dynamic team. This role is pivotal in ensuring the... 
    Senior

    CyberCoders

    Santa Clara, CA
    4 days ago
  •  ...A technology company in Santa Clara is seeking an adaptive Design Verification Engineer to improve ASIC design verification processes. The ideal candidate has over 10 years of experience and expertise in C/C++, Verilog, and modern verification libraries. Responsibilities... 
    Senior
    Contract work

    Infobahn Softworld

    Santa Clara, CA
    2 days ago
  • $196k - $310.5k

     ...can make a lasting impact on the world.We are now looking for a Senior System Level Test Engineer. NVIDIA is seeking Senior System Level Test Engineer to implement the world’s leading SoC's, GPU's and ASIC's. This position offers the opportunity to have real impact in a... 
    Senior
    Full time

    Nvidia

    Santa Clara, CA
    2 days ago
  • $136k - $218.5k

    NVIDIA is seeking best-in-class ASIC Verification Engineers to verify the world’s leading GPUs. In this role, you will be doing unit level verification of the process scheduling and system interface hardware of the GPU. This position will be working across many NVIDIA teams... 
    Senior
    Full time
    Shift work

    Nvidia

    Santa Clara, CA
    2 days ago
  • $136k - $218.5k

    NVIDIA is seeking an outstanding Senior ASIC Verification Engineer to verify the design and implementation of the world’s leading SoC's and GPU's. This position offers the opportunity to have a real impact in a dynamic, technology-focused company impacting product lines... 
    Senior
    Full time

    Nvidia

    Santa Clara, CA
    2 days ago
  • $136k - $218.5k

    We are now looking for a Senior ASIC Verification Engineer for our Coherent High Speed Interconnect team! For two decades, we have pioneered visual computing, the art and science of computer graphics. With our invention of the GPU - the engine of modern visual computing... 
    Senior
    Full time

    Nvidia

    Santa Clara, CA
    3 days ago
  • $152k - $253k

    Join NVIDIA as a Senior System Mechanical Engineer and help build the systems powering the future of AI and accelerated computing!In this role, you’ll...  ...will lead the development of mechanical systems for GPU and LPU-based AI infrastructure—from early concept through... 
    Senior
    Full time

    Nvidia

    Santa Clara, CA
    10 hours ago
  • $136k - $218.5k

    NVIDIA is seeking a hardworking Senior ASIC Design Verification Engineer to help drive sign-off strategies for world's leading GPUs and SoCs. This position offers you an outstanding opportunity to influence performance of the next generation GPU and SoC, allowing you to... 
    Senior
    Full time
    Work experience placement
    Remote work

    Nvidia

    Santa Clara, CA
    1 day ago
  • $168k - $264.5k

    NVIDIA is seeking outstanding Senior Design Verification Engineers with a specialty in tools and automation to drive efficiency and collaboration among...  ...relevant industry experienceExposure to computer architecture, ASIC design, and verification methodology is... 
    Senior
    Full time

    Nvidia

    Santa Clara, CA
    10 hours ago
  • $184k - $287.5k

     ...ready to push the boundaries of innovation and engineering? At NVIDIA, we lead the world in accelerated...  ..., graphics, and high‑performance systems.As a Senior Hardware Systems Engineer, you will help build next‑generation LPU (Language Processing Unit) platforms that support... 
    Senior
    Full time

    Nvidia

    Santa Clara, CA
    2 days ago
  • $180k - $230k

     ...and career with world class talent. We are looking for talented engineers and leaders who have an entrepreneurial spirit and want to...  ...design from concept to silicon to their next car. Summary: As a Senior ASIC Verification Engineer, you will be responsible for all aspects... 
    Senior
    Flexible hours

    Ethernovia

    San Jose, CA
    2 days ago
  • $163k - $237k

     ...milestone requirements, including comprehensive design rule check clean-up.Minimum qualifications:Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.8 years of technical experience... 
    Senior
    Worldwide

    Google

    Sunnyvale, CA
    10 hours ago
  • $163k - $237k

     ...bridge different subsystems. Mentor and guide junior verification engineers on design verification (DV) engineering best practices to...  ...delivering unparalleled performance, efficiency, and integration.As an Senior ASIC Design Verification Engineer, you will be part of a dynamic... 
    Senior
    Worldwide

    Google

    Mountain View, CA
    10 hours ago
  • $163k - $237k

    Plan the verification of complex digital design blocks by understanding the design specification and interacting with design engineers to identify important verification scenarios.Create and enhance constrained-random verification environments using SystemVerilog and UVM... 
    Senior
    Worldwide

    Google

    Sunnyvale, CA
    10 hours ago
  • $163k - $237k

    Work with multi-disciplined and multi-site teams of DFT engineers, RTL, Physical Designer Engineers, SOC DFT and Product Engineering.Work on subsystem level DFT SCAN, Memory Built-In Self-Test (MBIST) Architecture with multiple voltage, power domains. Develop tests that... 
    Senior
    Worldwide

    Google

    Mountain View, CA
    1 day ago
  • $163k - $236k

     ...creation for timing convergence, and final timing sign-off for ASIC tape outs.Debug and resolve common STA or design rule issues like...  ...flows.Minimum qualifications:Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or... 
    Senior
    Full time
    Worldwide

    Google

    Sunnyvale, CA
    1 day ago
  • $143.3k

     ...locations in the U.S., Europe, Singapore, and Japan, and customers across all industries. We are seeking experienced Design Verification Engineers to build the next generation of our cloud server chips. Our success depends on our world-class server infrastructure; we’re... 
    Senior
    Local area

    Amazon

    Cupertino, CA
    2 days ago
  • $242.35k - $363k

     ...scale networks that demand uncompromising performance.As a Senior Distinguished Engineer, you will be one of the most influential technical leaders...  ...architecture of next-generation, high-performance switch ASICs that will set the pace for the entire semiconductor industry... 
    Senior
    Permanent employment
    Internship
    Work from home

    Marvell

    Santa Clara, CA
    2 days ago
  • $190k - $220k

    Job description: Role Summary:We are seeking a Senior Package Design Engineer to join our custom SOC/ASIC development client. Youll work closely with cross-functional teams in the U.S. and overseas on high-performance package substrate design with a focus on signal/power... 
    Senior
    Overseas

    Affinity Executive Search

    San Jose, CA
    10 hours ago
  • $175k - $280k

     ...possible, with the ultimate goal of enabling human life on Mars.SR. ASIC DFT ENGINEER (SILICON ENGINEERING)At SpaceX we’re leveraging our...  ...critical milestonesCOMPENSATION AND BENEFITS:Pay Range:DFT Engineer/Senior: $175,000.00 - $280,000.00/per year Your actual level and... 
    Senior
    Permanent employment
    Temporary work
    Worldwide
    Weekend work

    SpaceX

    Palo Alto, CA
    4 days ago
  • $165k - $241.4k

     ...unified silicon architecture for web scale and service provider networks. Cisco’s silicon team provides a unique experience for ASIC engineers by combining the resources offered by a large multi-geography silicon organization and a large campus (with onsite gym,... 
    Senior
    Full time
    Temporary work
    Local area
    Flexible hours

    CISCO Systems

    San Jose, CA
    2 days ago
  • $168k - $264.5k

     ...world.We want a skilled and motivated Implementation Methodology Engineer for NVIDIA's elite VLSI team. This role involves owning...  ...equivalent experience.6+ years of hands-on proven experience in ASIC implementation methodology and EDA tool/flow development.Deep, practical... 
    Senior
    Full time

    Nvidia

    Santa Clara, CA
    2 days ago
  • $136k - $218.5k

     ...design, and product teams do not guess. They use your numbers. The engineers who do this well are rare. They think like circuit designers,...  ...table. Your data surfaces tradeoffs across architecture, VLSI, ASIC, firmware, and product teams. Your analysis is what settles... 
    Senior
    Full time

    Nvidia

    Santa Clara, CA
    3 days ago
  • $139k - $208.4k

     ...around the world. Come build with us!Role and ResponsibilitiesAs a Senior Engineer GPU RTL Design Engineer, you will contribute to the design and...  ...performance, power, and area (PPA).Experience with front-end ASIC design flows, including linting, synthesis, timing analysis,... 
    Senior
    Hourly pay
    Full time
    Worldwide
    Relocation

    Samsung Semiconductor

    San Jose, CA
    3 days ago
  • $193.3k - $261.5k

     ...accelerator SoCs for use by AWS internal teams. We’re looking for a Senior SoC Modeling Engineer to join the team and deliver new functional models,...  ...if you:- Are an expert in functional modeling for SoCs, ASICs, TPUs, GPUs, or CPUs- Are comfortable modeling in C++ or... 
    Senior
    Internship
    Local area
    Flexible hours

    Amazon

    Cupertino, CA
    2 days ago

Do you want to receive more vacancies?

Subscribe and receive similar vacancies to Senior LPU ASIC Engineer. Be the first to apply!