Senior Staff Hardware Design Engineer - high-speed PCB-level design and signal integrity implementation (Santa Clara)
$127.63k - $191.2kMarvell
About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your ImpactThe Hardware team of the Connectivity Business Unit develops evaluation boards and reference designs at data rates of 100G+/lane, for internal silicon evaluation and supporting customer designs of Marvell’s high-speed DSP/retimer products. The team is responsible for signal and power integrity simulations, component selection, schematic and layout designs, exploration of advanced board and packaging technologies, and board bring-ups. Qualified candidates have opportunities to work with a group of talent engineers to develop hardware evaluation platforms for Marvell’s products for next-generation datacenter applications.What You Can ExpectDesign validation boards for product evaluation, together with silicon designers, validation engineers, and other hardware / software engineers.Analyze end user’s technical requirement and develop PCB layout of evaluation platforms to demonstrate Marvell’s products for system applications.Board design may involve board layout, component selection, signal integrity and power integrity, safety, reliability and so on.Review and support customer designs using Marvell’s products, to ensure satisfying application requirement.Write technical reports and application notes.What We're Looking ForBS/MS/PhD in Electrical Engineering, or related fields.8+ years of relevant experience for Bachelor’s degree, or 5+ years for Master’s degree, or 3+ years for Ph.D.Proficient knowledge and experience on schematic capture and PCB layout tools.Familiar with PCB fabrication and assembly processes.Solid high-speed mixed-signal design experience at board level and skills in design trade-offs for signal integrity and power integrity.Knowledge on active and passive components for high-speed and high-density applications.Hands-on experience in using various lab equipment for measurements and debug.Familiar with IEEE 802.3 and optical module / AEC MSAs for datacenter applications.In-depth knowledge with PAM4 SerDes technology.Good verbal and written communication skills.Self-motivated and team-oriented individual, willing to take project ownership and drive projects to completion.Expected Base Pay Range (USD)127,630 - 191,200, $ per annumThe successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.Additional Compensation and Benefit Elements Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life’s most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process.All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at View email address on apply.placed-app.com Integrity To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.#LI-AP1SummaryLocation: Santa Clara, CAType:
$185.39k - $277.7k
...seeking a Director of Hardware Engineering to lead the design, analysis, and validation of high-speed board-level hardware for advanced... ...expertise in high-speed PCB design, signal integrity (SI), and power... ...#LI-JS22SummaryLocation: Santa Clara, CAType: Full time...SuggestedPermanent employmentFull timePart timeInternshipWork from home- ...career. THE ROLE: As a Signal Integrity Engineer in Networking... ...complex interconnects of high-speed Serializer/Deserializer... ...ASIC packaging team, PCB team, System Architect... ...to provide the design guidelines such as materials... ...fieldLOCATION:Santa Clara, CA#LI-RF1This role is...SeniorPart time
$300k
...solutions are designed to not... ...such as Best Engineering Team, Best... ...our Signal Integrity (SI) and Power... ...for a Senior Signal Integrity... ...Integrity Hardware Engineer... ...in Santa Clara, CA. In this... ...simulation of high-speed interconnects... ...PCB materials,... ...Perform link-level analysis for...SeniorContract workPart time$110k - $175k
...leading controller hardware, advanced... ...-oriented Senior Signal Integrity Engineer to develop next... ...in hardware design and signal... ...ONFI NAND and implementation techniques required for high-speed interfaces. This... ...and SSD PCB design. Participate... ...all system level requirements...SeniorImplementationWork experience placementFlexible hours$168k - $264.5k
...looking for a Senior Signal Integrity Engineer – Cryogenic... ...EM models for PCB and interconnect... ...-layer PCB designs under... ...conditionsDefine high-speed constraints,... ...results with hardware measurements... ...accuracyContribute to system-level understanding... ...: US, CA, Santa ClaraType:...SeniorFull timePart time$177.82k - $266.4k
...customer engineering teams from... ...across hardware, software... ...and system integration. The... ...ExpectAs Senior Principal... ...Engineer for Signal Integrity... ...role with high customer... ...mission is to implement best-in-... ...PDN designs and feeding... ...for high-speed SerDes... ...experience level: While the...SeniorPart timeInternshipWork from home$147.83k - $221.4k
...ImpactMarvell's Central Engineering organization... ...of Marvell's high-speed wireline and optical... ...analog mixed-signal circuits in advanced... ...high-speed wireline design.Design of analog... ....com.Interview Integrity To support fair and... ...SummaryLocation: Santa Clara, CAType: Full...SeniorPermanent employmentFull timePart timeInternshipWork from home$168k - $264.5k
...now looking for a Senior Signal & Power Integrity Engineer!NVIDIA has... ...complex system design problems.Modeling... ...EM tools.System-level signal integrity simulations of high-speed NVlink 200Gbs+,... ...optimize package, PCB, ASIC, mixed signal... ...SummaryLocation: US, CA, Santa ClaraType: Full...SeniorFull timePart time- ...software and hardware... ...of AI. Senior Staff PCB Layout Design EngineerLocation... ...: Santa Clara, CA (Hybrid... ...Design Engineer, you will... ...boundaries of signal density... ...of high-complexity... ...and speed.Key Responsibilities... ...or implementing... ...Expert-level proficiency... ...PLM/PDM integration for managing...SeniorPart time
- ...software and hardware... ...of AI. Senior Staff Hardware... ...EngineerLocation: Santa Clara, CA (... ...Engineer, you will... ...This is a high-impact,... ...between design and mass... ...Lead the implementation of HALT/... ...designs.Signal & Power Integrity Validation... ...senior-level oversight... ...of high-speed SerDes (...SeniorImplementationContract workPart time
$300k
...Our solutions are designed to not only meet... ...awards, such as Best Engineering Team, Best... ...system architectures, high-speed PCB designs, and signal integrity to deliver state-... ...You'll DoOur Hardware Design Engineering... ...EngineeringExperience level: Mid-Senior LevelIndustry:...SeniorContract workPart timeLocal areaOverseas$168k - $264.5k
...best-in-class Senior Physical Design Methodology Engineer, PPA Fusion... ...'s best high speed communication... ...for implementation of graphics... ...convergence in IR/Signal-EM, power... ...and Route, Integration and Verification... ...00 USD for Level 4, and 196,... ...: US, CA, Santa Clara; US, TX,...SeniorImplementationFull timePart time$200k - $250k
...Title: Principal RTL Design Engineer - PCIe / CXL / High-Speed SoCLocation: Santa Clara, CACompensation: $200K... ...DesignPosition OverviewAs a Sr. Staff or Principal RTL... ...and implement RTL design blocks, demonstrating... ...analysis, debugging, block-level functional verification...ImplementationPart time$168k - $264.5k
...now looking for a Senior Signal Integrity Engineer to join our Packaging... ..., you will drive high-speed SerDes channel design, simulation, and... ...design, or related hardware development... ...- 264,500 USD for Level 4, and 196,000 USD... ...SummaryLocation: US, CA, Santa ClaraType: Full...SeniorFull timePart time$100k
...developed a high... ...contributors of all seniorities.... ...seeking a Signal Integrity Engineer to join our... ...exposure designing high speed interconnects... ...based out of Santa Clara, CA or Austin... ...experience levels for this... ...high-speed PCB or package... ...physical hardware. Perform simulation...Permanent employmentPart time$135.9k - $201.13k
...ImpactAs a Senior Staff Digital ASIC Design Engineer at... ...developing the high... ...architects and implements advanced... ...pipelines, high speed datapaths... ...that integrate cutting edge... ...and PHY level... ...algorithm‑driven hardware implementation... ..., and signal integrity... ...US-CA - Santa Clara - BKH; US...SeniorImplementationPermanent employmentFull timePart timeInternshipWork from home$168k - $264.5k
...NVIDIA is looking for a Senior Design Engineer for our Coherent High Speed Interconnect team!For two... ...of a new class of integrated products with NVIDIA partners... ...0 USD - 264,500 USD for Level 4, and 196,000 USD - 310... ....SummaryLocation: US, CA, Santa ClaraType: Full time...SeniorFull timePart time- ...software and hardware innovation... ...the Senior Staff SI/PI Engineer, you will... ...electrical integrity of d-Matrix’s high-performance... ...focusing on high-speed interfaces... ...: Design and optimize... ...constraints for the PCB Design... ...or Signal Integrity.... ...Mastery: Expert-level...Part time
- ...Principal CAD PCB Physical Design Engineer in the Network... ...board design, signal/power integrity, and manufacturing... .... This is a senior-level, hands-on... ...physical design for high-speed and high-power... ...of Hardware Design engineers... ...sponsorshipLOCATION:Santa Clara, CA#LI-RF1Benefits...Part time
- ...seeking a highly skilled Senior Hardware... ...Analysis Engineer to lead... ...system-level validation... ...hardware design teams, manufacturing... ..., and integration... ...memory, high-speed... ...frequency, signal integrity... ...related to PCB, PCBA, component... ...and implementing... ...LOCATION:Santa Clara, CAThis...SeniorContract workPart time
- ...architectures for high-throughput... ...2. High-Speed Digital & SerDes Design • Design and integrate high-speed interfaces... ...• Ensure signal integrity,... ...5. Hardware Design & PCB Implementation • Own schematic... ...and system engineering teams •... ...with system-level performance...SeniorImplementationContract work
$168k - $264.5k
...looking for a highly motivated... ...self-starting Senior Circuit Design Engineer to join our... ...analog/mixed-signal circuits for... ...transistor -level and system-... ...and physical implementation of analog/... ...benefits of integrated power delivery... ...: US, CA, Santa Clara; US, CA, RemoteType...SeniorImplementationFull timePart time$200k - $322k
...a self‑motivated senior engineer for the Aerial Omniverse... ...hire will own the design and implementation of the real‑time signal‑processing... ...need to see:PhD in high‑performance computing... ...- 322,000 USD for Level 5, and 248,000 USD... ...: US, CA, Santa Clara; US, CO, RemoteType...SeniorImplementationFull timePart time$182.36k - $273.2k
...the Data Center Engineering business group.... ...owns the digital design of high performance mixed signal ICs used in high speed interconnects in... ...centers. These chips implement advanced digital... ...management integrated circuits.• Work... ...SummaryLocation: Santa Clara, CAType: Full time...SeniorImplementationPermanent employmentFull timePart timeInternshipWork from home$200k - $250k
...Job Title: Principal Design Verification Engineer - PCIe / High-Speed SoCLocation: Santa Clara, CACompensation: $20... ...) and full-chip integrations, drive closure of functional... ...IP and subsystem-level verification; ensure... ....Architect and implement bring-up and silicon...Part time$164.47k - $311.89k
...analog and mixed-signal IP... ...transistor-level feasibility... ...AMS circuits.Design novel architectures... ...IPs for SoC integration.Support SoC... ...architects, design engineers, and... ...definition, high-speed design techniques... ...California, Santa... ...California, Santa Clara; US, Oregon,...Full timePart timeLocal areaImmediate startShift work$184k - $287.5k
...are hiring a Senior Software Engineer to advance... ...Libraries. You will design and optimize high-performance... ...make CUDA a speed-of-light... ...:Design and implement foundational... ...from high-level generic interfaces... ..., build integration, tests,... ...SummaryLocation: US, CA, Santa Clara; US,...SeniorImplementationFull timePart time$141k - $193.5k
...materials engineering solutions... ...world. We design, build and... ...0Location:Santa Clara,CAYou’ll benefit... ...seeking a Senior... ...manage a high‑performance... ...strategies, and implement quality frameworks... ...executive-level engagement... ...speed‑to‑market.... ...supplier integration and quality...SeniorImplementationFull timeContract workPart time- ...the ASIC (chip) design for high-performance network... ...front-end design/integration team, you will... ...teams, and product engineers to achieve first... ...candidate will work with senior silicon design... ...of high-speed I/O subsystemsCollaboration... ...LOCATION:Santa Clara, CAThis role is not...SeniorPart time
$203.45k - $344.3k
...forefront of innovation, integrating advanced AI and... ...operations. Lead the design of a highly available and scalable... ...roadmap from a strategic level, balance short-term... ...and closed-loop engineering system.Job ResponsbilitiesResponsible... ...: Design and implement a data lineage...SeniorImplementationFull timeTemporary workPart timeWork experience placement
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