Senior ASIC Digital Design Engineer: Processor RTL & IP
GlobalFoundries
GlobalFoundries in Santa Clara, CA is seeking a PMTS Digital Design Engineer to drive architecture implementation, microarchitecture development, and RTL design of high-performance processor cores and subsystems. You will partner with architecture, verification, physical design, DFT, firmware, and software teams to meet performance, power, area, and schedule targets, and mentor engineers while shaping next-generation processors. #J-18808-Ljbffr GlobalFoundries
Vacancy posted 1 day ago
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