Senior Memory Controller Verification Engineer - Tapeouts
$128k - $258.75kNVIDIA
NVIDIA is looking for a Senior Memory Controller Verification Engineer in Santa Clara, CA, to work on Tegra SoCs. The role involves defining verification scope, collaborating with memory controller designers, and ensuring coverage of RTL design. Candidates should have 5+ years in ASIC verification and experience with DDR and LPDDR memories. The position offers a competitive salary range of 128,000 - 258,750 USD, and equity options. NVIDIA values diversity and encourages applicants from all backgrounds. #J-18808-Ljbffr NVIDIA
$128k - $258.75k
NVIDIA is seeking hardworking and creative Senior Memory Controller Verification Engineer for our Tegra SoCs! At Nvidia, we have crafted a team of outstanding people stretching around the globe, whose mission is to push the frontiers of what is possible today and define...Senior- A technology company in Santa Clara is seeking an adaptive Design Verification Engineer to improve ASIC design verification processes. The ideal candidate has over 10 years of experience and expertise in C/C++, Verilog, and modern verification libraries. Responsibilities...SeniorContract work
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