Senior ASIC Design Engineer - Clocks IP
NVIDIA Gruppe
Responsibilities As a Clocks team member, you will be architecting the clock domain to satisfy functional, physical and testing design requirements. Engage with multiple teams and design the GPU or CPU clocks to satisfy all the architectural/design/physical constraints. Improve Power, Performance, and Area (PPA) of innovative NVIDIA chips by evaluating trade-offs across DFx, Physical Implementation, Power Optimization and Ease of timing closure to innovate and implement new Clocking topologies in RTL. Collaborate with Physical design and timing team to evaluate Clocking concerns and develop solutions for supporting high speed Clocking. Together with other team members, we deliver clock RTL information to GPU, CPU and SOC verification team, timing and DFT teams. Get involved in end-to-end cycle of ASIC execution starting from micro‑arch, design implementation, design fixes, sign‑off checks and all the way to Silicon bring‑up. Qualifications BS in Electrical Engineering or equivalent experience (MS preferred) 3+ years of relevant work experience. Deep understanding of logic optimization techniques and PPA trade‑offs. Excellent interpersonal skills and ability to collaborate with multiple teams. Experience in RTL design (Verilog), verification and logic synthesis. Strong coding skills in python or other industry‑standard scripting languages. Understanding of sub‑micron silicon issues like noise, cross‑talk, and OCV effects is a plus. Implementing on‑chip clocking networks is a bonus. Preferred Qualifications Experience with clocks controller, clocks logic design Understanding of system level artifacts like power, noise, etc Experience with scalable designs and architecture. Hands‑on silicon debug is a plus. Benefits & Compensation With competitive salaries and a generous benefits package, we are widely considered to be one of the technology world’s most desirable employers. We have some of the most brilliant people in the world working for us and, due to unprecedented growth, our teams are rapidly growing. Are you passionate about becoming a part of a best‑in‑class team supporting the latest in GPU and AI technology? If so, we want to hear from you. #LI-Hybrid Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 136,000 USD – 218,500 USD for Level3, and 168,000 USD – 264,500 USD for Level4. You will also be eligible for equity and benefits. NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law. #J-18808-Ljbffr NVIDIA Gruppe
$136k - $218.5k
...intelligence. Make the choice to join us today. The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for... ...CPU clocking. The team collaborates with the front design team to understand the clocking requirements for the...SeniorWork experience placement$136k - $218.5k
NVIDIA Gruppe in Santa Clara is looking for a talented engineer to join their Clocks team. This role involves architecting clock domains and collaborating... ...Engineering or equivalent, 3+ years of experience in RTL design, strong skills in Python, and excellent interpersonal...Senior- A leading technology company in Santa Clara is seeking an experienced Compiler Circuit Design Engineer to contribute to innovative ASIC design. In this role, you will drive the development of SRAM and register files, collaborate with compiler vendors, and integrate new...Senior
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...NVIDIA is seeking a hardworking Senior ASIC Design Verification Engineer to help drive sign-off strategies for world's leading GPUs and... ...Circuit Solutions Group to develop various innovative IPs for hardware security, clocking, voltage regulation and silicon correlation....SeniorWork experience placementRemote work$150k - $220k
...will fundamentally change the design, economics, manufacturing... ...life. We are seeking a Senior ASIC Design Engineer to join our processor subsystem... ...planning of Arm processor IP and associated subsystem... ...ensuring correct connectivity, clocking, and reset architecture...SeniorFull timeWork at officeImmediate startVisa sponsorshipNight shift$147.4k - $272.1k
...Hardware Technologies group, you’ll help design our next-generation, high-performance,... ...their devices! Description As a Pixel IP DMA Design Engineer in the Pixel IP team, you will work... ...Experience in multimedia IP/SoC front‑end ASIC RTL design Tight‑knit collaboration skills...Relocation$128k - $312k
...innovation. Comprising brilliant engineers and visionaries, the team designs and develops advanced AI... ...role, you will focus on Ethernet IP integration, SoC clocking and reset architectures, and high... ...performance data paths within our custom ASICs. This role is located in Palo...Hourly payFull timeTemporary workFlexible hours$150k - $220k
E-Spac is seeking a Senior ASIC Design Engineer based in Saratoga, California, to lead the integration and verification of Arm processor IP for satellite IoT systems. This role requires 7+ years of experience in ASIC/SoC design, proficiency in RTL design using SystemVerilog...Senior$170k - $230k
SpaceX is seeking a Sr. SOC/ASIC Physical Design Engineer to develop next-generation silicon for space and ground infrastructures. You'll work with top engineers across various disciplines to enhance the Starlink network, enabling connectivity globally. Ideal candidates...Senior- SPACE EXPLORATION TECHNOLOGIES CORP is looking for a motivated SR. RTL DESIGN ENGINEER in Sunnyvale, CA to develop cutting-edge ASICs for Starlink. This role includes responsibilities in evaluating design architectures, implementing RTL in Verilog/System Verilog, and collaborating...Senior
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Google Inc. in Sunnyvale is seeking a Senior Physical Design Flow and Methodology Engineer to shape AI/ML hardware acceleration. You will drive TPU technology,... ...millions worldwide, ensuring high-quality results for all ASIC tapeouts. The ideal candidate has at least 8 years of...SeniorWorldwide- SPACE EXPLORATION TECHNOLOGIES CORP (SpaceX) in Sunnyvale, CA is looking for a Sr. SOC/ASIC Physical Design Engineer. The role involves developing cutting-edge silicon for deployment in space and improving physical design methodologies to enhance the Starlink network. Ideal...Senior
$181.1k - $318.4k
Apple Inc. in Sunnyvale, California is seeking a Wireless Design Engineer to join their wireless silicon development team. This role involves... ...specifications, and ensuring high performance low power ASIC designs. The ideal candidate should have at least a BS degree...Senior$116k - $189.75k
NVIDIA Corporation in Santa Clara is seeking an ASIC Clocks Verification Engineer to collaborate with ASIC designers and verification engineers. You will verify high-frequency clock structures and design GPU clock architecture to meet requirements. The ideal candidate...Senior$250k - $290k
Piper Companies is looking for a Senior ASIC Design Engineer to join a cutting-edge AI networking company onsite in Saratoga, CA Monday - Friday,... ...implementation. Drive integration of high-speed I/O and third-party IPs into the ASIC design. Qualifications 10+ years of...SeniorMonday to Friday$136k - $218.5k
We are now looking for an ASIC Design Engineer. NVIDIA is seeking best‑in‑class ASIC Design Engineers to design and implement the world’s leading SoC's and GPU's. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting...Senior- A leading technology company is seeking a Cellular ASIC Design Engineer to develop and optimize the design and methodology for integrated circuits in advanced process technologies. The role requires a strong VLSI background, with responsibilities including timing closure...Senior
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A leading technology company in Santa Clara seeks an experienced ASIC Design Engineer to design GPU sub-systems and implement architectural features. The ideal candidate has over 5 years of ASIC development experience, a master's degree in electrical or computer engineering...Senior- NVIDIA Gruppe is looking for a skilled physical designer to handle the design and implementation of GPUs and other ASICs targeted at diverse markets such as desktop and mobile. Ideal candidates will possess at least 5 years of experience in VLSI design implementation,...Senior
$188k - $325k
## Senior Principal IP Design EngineerApplylocations: Santa Claratime type: Full timeposted on: Posted 30+ Days Agojob requisition id: JR-260... ...design performance goals* Partner with a multi-functional engineering team to implement and validate physical design aspects of...SeniorWork experience placementLocal area- ...dedication to excellence guide us. As an ASIC Design Engineer, you will build powerful SoC and GPU... ...RTL builds. Working on a diverse list of IPs, including GPU’s time distribution... ...Strong C/C++ skills. Experience in multi-clock domains and asynchronous logic, interface...Work experience placement
$181.1k - $318.4k
...Technologies group, you’ll help design and manufacture our... ...a mix of strategic engineering along with hands-on,... ...Description As a GPU Clocking engineer, you will collaborate... ...Experience with ASIC integration including one... ...Experience integrating IP from both internal and...Relocation$181.1k - $318.4k
...group, you'll contribute to designing, optimizing, and manufacturing... ...Description As a Cellular ASIC Design Engineer, you'll develop and optimize... ...innovative products at the block/IP-level and system-level in... ...methodologies including clock gating, power gating, and dynamic...Relocation$190.61k - $269.1k
...accelerators. If you are an engineer with strong technical... ...for complex SoC IP blocks; implement RTL in... ...synthesis‑ and timing‑clean designs Collaborate closely... ...and implementation for ASIC/SoC development Preferred... ...design challenges such as clock domain crossings, power...SeniorLocal areaShift work$200k - $300k
...Senior ASIC Design Verification Engineer Join Ethernovia's team to make a lasting impact on the future of packet processor-centric networking solutions... ...: Networking (Ethernet MAC, PHY, Switching, TCP/IP, security, PCIe and other industry standard protocols)...SeniorFlexible hours- Advanced Micro Devices is seeking a Senior ASIC Design Engineer in Santa Clara, CA, to architect and design DPU ASICs for AI networking workloads. The role involves collaborating on the full ASIC lifecycle and ensuring high-speed, complex ASIC development. The ideal candidate...Senior
$164.47k - $311.89k
...Role Intel is seeking a Senior Design Verification Engineer for the Silicon Chassis team... ...chassis and interconnect IP blocks from planning through... ...functions including debug, trace, clock and power management, RAS,... ...and methodologies), Custom ASIC (leveraging existing IP for...SeniorInternshipLocal areaImmediate startShift work- ...technology company in Santa Clara is looking for an experienced ASIC engineer to join their Clocks team. You will be responsible for architecting clock... ...a BS in Electrical Engineering and experience in RTL design and logic optimization. This role offers a competitive salary...Senior
$132k - $207k
...a multi-disciplinary team of circuit designers and mask designers. Perform physical... ...digital and mixed‑signal functions such as clock generators, op‑amps, sensors,... ...technologies using Cadence tools. Work with ASIC and mixed‑signal engineers to customize designs for integration...Senior$256.05k - $361.48k
# **Welcome!**## .Senior Physical Design Integration Engineer page is loaded## Senior Physical Design... ..., place and route, clock tree synthesis, floor planning... ...design teams to improve IP and ultimate product quality... ...in: Logic Design, VLSI/ASIC Design, Computer Architecture...SeniorWork experience placementLocal areaImmediate startFlexible hoursShift work
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