Senior AI SoC Design Engineer

Job Overview Join Intel's AI Revolution. Intel's new AI SoC organization develops cutting‑edge products powering a wide range of AI applications, from edge devices to data‑center accelerators. We are seeking highly experienced technical leaders with deep expertise, strong communication skills, and the ability to drive complex, cross‑functional execution in a fast‑paced and dynamic environment. If you are passionate about shaping the future of AI hardware and influencing next‑generation architectures, this role is your opportunity to make a lasting impact. Key Responsibilities Own architecture and end‑to‑end design of complex SoC subsystems from concept through silicon bring‑up. Define microarchitecture and drive RTL design and integration for high‑performance and power‑efficient designs. Lead cross‑functional collaboration across architecture, design, verification, physical design, firmware, and validation teams. Drive system‑level power, performance, and area (PPA) tradeoffs across multiple IPs and subsystems. Ensure design quality at scale including clock, reset, power domain crossings, timing closure strategy, and silicon robustness. Influence and drive technical direction, design methodologies, and execution across teams. Mentor senior engineers and provide technical leadership across organizations. Contribute to and shape next‑generation SoC and AI architecture roadmap. Minimum Qualifications 12+ years of experience with a Bachelor's degree, or 10+ years with a Master's degree, or 8+ years with a PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field. Proven ownership and delivery of complex SoC subsystems or full‑chip designs from architecture through silicon bring‑up. Deep expertise in RTL design, coding, and simulation using SystemVerilog. Strong experience in microarchitecture and SoC architecture with demonstrated impact on product outcomes. Strong system‑level design expertise including power, performance, and area trade‑offs and optimizations across subsystems. Experience leading cross‑functional teams and driving execution across multiple engineering domains. Preferred Qualifications Experience defining or influencing SoC or platform architecture roadmap across multiple product generations. Strong understanding of AI/ML workloads and their impact on hardware architecture. Proven track record of innovation, including complex microarchitecture or SoC design contributions. Experience in post‑silicon debug and driving resolution of complex system‑level issues. Demonstrated ability to influence senior stakeholders and drive alignment across globally distributed teams. Track record of mentoring and developing senior technical talent. Job Type: Experienced Hire Shift: Shift 1 (United States of America) Primary Location: US, California, Santa Clara Additional Locations: US, California, Folsom Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Annual Salary Range: $190,610.00‑361,480.00 USD. Position of Trust This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes, subject to country law, extended education, SEC sanctions, and additional criminal and civil checks. EEO Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. #J-18808-Ljbffr Intel Corporation