Senior DFT Engineer
W3Global
Job Description:
5+ years of hands-on experience in DFT and ATPG for SoC or ASIC designs
Strong understanding of DFT fundamentals including controllability, observability, and scan-based testing
Proven expertise in ATPG pattern generation, analysis, and debug
Experience with MBIST, including memory test architectures and diagnostics
Knowledge of IO Test methodologies for interface and pin level validation
Solid understanding of clock DFT and clock verification concepts
Strong grasp of digital design and RTL fundamentals
Experience with industry standard DFT/ATPG EDA tools
Ability to work effectively in fast paced, high performance semiconductor programs
Strong analytical, problem solving, and communication skills
Vacancy posted 21 hours ago
Similar jobs that could be interesting for youBased on the Senior DFT Engineer in Santa Clara, CA vacancy
- Job description Senior DFT EngineerMoTek Technologies has an immediate opening for a Senior DFT Engineer:The ideal candiate will be responsible for DFT flows and implementation Run RTL, gate, and gate with SDF simulations to confirm correct functionality of DFT logic....SeniorImmediate start
MoTek Technologies
San Jose, CA3 days ago $168k - $264.5k
We are now looking for a Senior DFT Methodology Engineer! As a Senior DFT Methodology Engineer, you will architect and develop the test methodologies that make our next generation of silicon testable, debuggable, and secure from the very first bring-up. NVIDIA has crafted...SeniorFull timeNvidia
Santa Clara, CA5 days ago$168k - $264.5k
As a Senior DFT Engineer - Post-Silicon , you will take pioneering DFT capabilities beyond implementation—connecting silicon behavior, test data, and product learning to deliver robust, production-ready DFT solutions for NVIDIA’s most advanced chips.NVIDIA has continuously...SeniorFull timeNvidia
Santa Clara, CA2 days ago$136k - $218.5k
...human imagination and intelligence. Make the choice to join us today.Design-for-Test Engineering at NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's...SeniorFull timeNvidia
Santa Clara, CA3 days ago- ...Cisco Systems, Inc.- Silicon One team is looking for a seasoned test engineer to lead DFT planning, develop test benches, and verify complex silicon designs. The role emphasizes collaboration with design, verification, and PD teams to ensure robust test coverage across...Senior
$167.7k - $245.2k
...development of test benches to verify comprehensive Design-for-Test (DFT) architecture that supports ATE screening, in-system test,... ...verification. Minimum QualificationsBachelor’s in Electrical Engineering or equivalent with at least 7+ years (or Master's with 4+ years...SeniorFull timeTemporary workLocal areaFlexible hours3 days per weekCISCO Systems
San Jose, CA2 days ago- ...NVIDIA Corporation in Santa Clara, CA is seeking a Senior DFT Engineer to optimize design tradeoffs and methodology for next-generation CMOS tech. You will lead testing activities, develop patterns, verify designs, and debug complex issues as part of a collaborative team...Senior
- ...Cisco Systems, Inc. is seeking an experienced engineer to lead test planning and design-for-test development for advanced silicon platforms. You will craft test benches, verify DFT architectures, and collaborate with design and PD teams to implement robust in-system test...Senior
$196k - $310.5k
...advanced technology team to optimize design tradeoffs and methodology on next generation CMOS technology. We are looking for a Senior DFT Engineer to join our dynamic and growing team! If you are problem solver and highly motivated individual searching for a collaborative...Senior$168k - $264.5k
.... Make the choice to join us today.Design-for-X Engineering at NVIDIA works on groundbreaking innovations involving... ...semiconductor chips.What you'll be doing:As a senior member in our team, you will work on innovating in the DFT Power, Thermal & Voltage Noise Methodology areas...SeniorFull timeNvidia
Santa Clara, CA2 days ago- ...Meta is seeking an ASIC Engineer specializing in Design for Test (DFT) on the Infrastructure Silicon team. You will architect testability solutions for large-scale ASICs and drive DFT strategies from RTL to silicon bring-up. Responsibilities include achieving high fault...Senior
$167.7k - $245.2k
...development of test benches to verify comprehensive Design-for-Test (DFT) architecture that supports ATE screening, in-system test,... .... Minimum Qualifications Bachelor's in Electrical Engineering or equivalent with at least 7+ years (or Master's with 4+ years...SeniorFull timeTemporary workLocal areaFlexible hours3 days per week$168k - $264.5k
...a lasting impact on the world.Join NVIDIA's Design-for-Test Engineering team in Santa Clara, CA, where we are driven by a passion for... ...progress in AI. We keep evolving to solve emerging challenges. As a Senior DFT - Silicon Validation Engineer, you will work on ground...SeniorFull timeShift workNvidia
Santa Clara, CA3 days ago$120k - $220k
...expand global economies, protect space and our planet and enhance our overall quality of life. We are seeking a Senior Design-for-Test (DFT) Engineer to join our SoC design team. In this role, you will be responsible for defining and implementing comprehensive DFT...SeniorFull timeWork at officeImmediate startVisa sponsorshipNight shifteSpace
Saratoga, CA3 days ago$136k - $218.5k
...impact on the world.We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want to challenge... ...in logic synthesis and equivalence checking/FV.Understanding of DFT logic and experience with DFT timing closure for various modes e...SeniorFull timeNvidia
Santa Clara, CA3 days ago$168k - $264.5k
We are now looking for a Senior Circuit Timing Engineer!NVIDIA stands at the intersection of hardware excellence and AI breakthrough, where every line... ..., timing constraints, timing and power convergence, DFT, as well as timing ECO implementation.What we need to see:...SeniorFull timeWorldwideShift workNvidia
Santa Clara, CA2 days ago$163k - $236k
...STA flows.Minimum qualifications:Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or... ..., you will work with architecture, logic design, and DFT teams to understand and implement their requirements.The AI and...SeniorFull timeWorldwideGoogle
Sunnyvale, CA4 days ago$167.7k - $245.2k
...Your primary focus will be to drive high-quality Design for Test (DFT) RTL, ensuring robust and reliable silicon solutions that meet... ...:Bachelor's or a Master's Degree in Electrical or Computer Engineering required with at least 7 years of experiencePrior experience in...SeniorFull timeTemporary workLocal areaFlexible hoursCISCO Systems
San Jose, CA10 hours ago$175k - $280k
...with the ultimate goal of enabling human life on Mars.SR. ASIC DFT ENGINEER (SILICON ENGINEERING)At SpaceX we’re leveraging our experience... ...milestonesCOMPENSATION AND BENEFITS:Pay Range:DFT Engineer/Senior: $175,000.00 - $280,000.00/per year Your actual level and base...SeniorPermanent employmentTemporary workWorldwideWeekend workSpaceX
Palo Alto, CA2 days ago$144k - $230k
...lasting impact on the world.We are seeking a highly skilled Senior Failure Analysis (FA) Engineer to drive die-level logic fault localization for our... ...devices. You will work closely with our Design, Test, and DFT teams to identify root causes of silicon failures, accelerate...SeniorFull timeNvidia
Santa Clara, CA4 days ago$168k - $264.5k
...world.We want a skilled and motivated Implementation Methodology Engineer for NVIDIA's elite VLSI team. This role involves owning... ...AI/ML-assisted flow optimization.Partner with architecture, RTL, DFT, physical build, and sign-off teams to surface PPA opportunities...SeniorFull timeNvidia
Santa Clara, CA4 days ago$168k - $258.75k
NVIDIA is seeking a highly skilled Senior PCB Library Engineer to own the development, validation, and release of PCB library assets supporting the... ...and improve design quality.Apply strong DFM, DFA, and DFT principles to all library deliverables.Establish and maintain...SeniorFull timeNvidia
Santa Clara, CA4 days ago$164.47k - $269.1k
...Future of Computing at IntelIntel is seeking an experienced Senior Static Timing Analysis (STA) Engineer to help drive the development of next-generation... ...will work across architecture, logic design, clocking, DFT, and physical design teams to ensure successful timing...SeniorFull timeLocal areaImmediate startShift workIntel
Santa Clara, CA21 hours ago- ...transforming key workloads with ultra high-speed inference.Senior Product, Test and Yield Enhancement Engineer — TaiwanAbout the RoleCerebras is seeking a senior... ..., and die-to-die interconnects.Partner closely with DFT, architecture, design, performance, software and...Senior
Cerebras Systems
Sunnyvale, CA1 day ago $152k - $253k
We are looking for a creative PCB Design Engineer for the ATE test platform. NVIDIA has continuously reinvented itself for three decades.... ...functional teams including design, SI, high speed characterization, DFT, and ATE test to implement effective test solutions What we need...SeniorFull timeNvidia
Santa Clara, CA2 days ago$116k - $184k
...build the next era of computing!We're seeking an outstanding Senior HTOL Reliability Engineer to join our Santa Clara lab. This role requires deep... ...translations, debugging, bringup, experience working with DFT.Familiarity with reliability analytics platforms (e.g., JMP...SeniorFull timeNvidia
Santa Clara, CA2 days ago$147.4k
...builders, and problemsolvers behind tomorrow’s technology. As a Senior Staff Test Engineer in our Research & Development team, you'll have the... ...PLL/clock characterization, and PVT margin analysisImplement DFT-based test: scan, at-speed scan, MBIST/LBIST, JTAG, and ATPG...SeniorLocal areaInfineon Technologies
San Jose, CA2 days ago- ...strategy, layout review, RF structure review, BOM review, DFM/DFT review, design verification, bring-up, debug,... ...actions, and lessons-learned across programs. Mentor senior and mid-level engineers; establish hardware design best practices, checklists, libraries...SeniorWork at officeImmediate start
II-VI Aerospace & Defense
Santa Clara, CA1 day ago - ...NVIDIA Corporation is seeking a Senior Manager of ASIC Chip Engineering in Santa Clara. You will drive the execution of SOCs from concept to production, coordinating IP design, DFT, physical design, and emulation across a global, matrixed team. The role requires a...Senior
$152k - $253k
We are looking to hire a Hardware Systems Engineer who will work in the test solutions group at NVIDIA developing manufacturing test solutions... ...and diagnostic software.Review and provide feedback for DFT in the early design stages.Debug complex hardware and software issues...SeniorFull timeContract workNvidia
Santa Clara, CA21 hours ago
Do you want to receive more vacancies?
Subscribe and receive similar vacancies to Senior DFT Engineer. Be the first to apply!
Related searches
- senior living Santa Clara, CA
- senior associate vice president Santa Clara, CA
- senior app developer Santa Clara, CA
- senior manufacturing engineer Santa Clara, CA
- senior ml engineer Santa Clara, CA
- senior executive director Santa Clara, CA
- senior application support engineer Santa Clara, CA
- senior manager data analytics Santa Clara, CA
- senior revenue accountant Santa Clara, CA
- senior devops Santa Clara, CA