TPU SoC Design Engineer, Cloud
$138k - $198kGoogle Inc.
corporate_fare Google place Sunnyvale, CA, USA About the job In this role you’ll shape the future of AI/ML hardware acceleration, driving cutting‑edge TPU technology that powers Google’s most demanding AI/ML applications. You’ll work on SoC‑level RTL design for data center accelerators, designing top‑level RTL, architecture, global communication buses, and integration of complex ASIC designs. As a Soc Design Engineer on the TPU team you will help create innovative and efficient hardware solutions, addressing challenging technical problems at the forefront of AI hardware. Qualifications Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. 2 years of experience architecting RTL solutions employing software‑based construction, instantiation, customization or generation of RTL. Experience with industry‑standard EDA tools for simulation, synthesis, and power analysis. Preferred qualifications Master’s degree or PhD in Electrical Engineering, Computer Engineering or Computer Science with an emphasis on computer architecture. Experience with scripting languages (Tcl, Python or Perl). Experience with SOC implementation standards and interfaces (e.g. AXI). Experience with CDC, RDC, RTL linting and LEC. Understanding of digital design fundamentals, synchronous and asynchronous logic, state machines, and bus protocols. Responsibilities Define and document the microarchitecture for digital designs within the TPU. Develop high‑quality, performant, and power‑efficient RTL code, primarily in SystemVerilog. Partner with the Verification team to develop test plans, debug RTL, and ensure functional correctness. Work closely with the Physical Design team to meet timing, area, power, and manufacturability requirements. Contribute to the development and enhancement of design tools, flows, and methodologies. Compensation and benefits US: $138,000 – $198,000 (USD) + 15% bonus target + equity + benefits. Learn more about benefits at Google. EEO and other statements Google is an equal‑opportunity employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity, national origin, disability, age, genetic information, veteran status, marital status, pregnancy, or related condition (including breastfeeding). See Google's EEO policy, the workplace discrimination policy, and our hiring process. English proficiency is required for all roles unless otherwise stated. Equity is granted exclusively and discretionially by Alphabet Inc. on the basis of an agreement concluded between you and Alphabet Inc. Alphabet Inc. is your sole contractual partner with respect to equity grants. GSU grants are not guaranteed, are discretionary, and subject to approval by the Alphabet Inc. board of directors or its delegate. #J-18808-Ljbffr Google Inc.
$138k - $198k
...s degree in Electrical Engineering, Computer Engineering,... ...RTL. Experience with SOC implementation standards... ...Understanding of digital design fundamentals, including... ...to drive cutting-edge TPU (Tensor Processing Unit... ...include Googlers, Google Cloud customers, and billions...SuggestedFull timeWorldwide- Google Inc. is seeking a Soc Design Engineer in Sunnyvale, California, to shape the future of AI and ML hardware acceleration. This role involves driving TPU technology and working on SoC-level RTL design for advanced AI applications. The ideal candidate will have a Bachelor...Suggested
- Google Inc. in Sunnyvale, CA seeks a talented engineer to shape the future of AI hardware by driving TPU technology. You will work on RTL design and system architecture, guiding complex SoC implementations within cross-functional teams. The ideal candidate has a strong...Suggested
$138k - $198k
...Bachelor's degree in Electrical Engineering, Computer Engineering,... .... 4 years of experience with design verification. Experience with... ...opportunity to drive cutting‑edge TPU (Tensor Processing Unit) technology... ...include Googlers, Google Cloud customers, and billions of Google...SuggestedFull timeWorldwide$163k - $237k
Senior Design and Integration Engineer, Cloud TPU Sunnyvale, CA, USA. Level: Mid. Job Summary Shape the future of AI/ML hardware acceleration by driving the design, optimization, and integration of next‑generation Tensor Processing Units (TPUs). Work closely with Verification...Suggested$163k - $237k
...Bachelor's degree in Electrical Engineering, Computer Engineering,... ...8 years of experience in ASIC design. Experience interacting with... ...opportunity to drive cutting‑edge TPU (Tensor Processing Unit) technology... ...will join a team working on SoC‑level Register‑Transfer Level...Worldwide$138k - $198k
...hardware acceleration, focusing on TPU technology that powers Google’... ...clock control subsystem’s design micro‑architecture... ...Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer... ...grained clock gating for low‑power SoC optimization. Knowledge of processor...Full time$138k - $198k
...Bachelor's degree in Electrical Engineering, Computer Engineering,... .... 4 years of experience with design verification. Experience in verifying... ...Experience with three or more SoC projects/cycles. Experience... ...opportunity to drive cutting‑edge TPU (Tensor Processing Unit)...Full timeWorldwide$138k - $198k
...s degree in Electrical Engineering, Computer Engineering,... ...of experience in ASIC design, design automation, or... ...to drive cutting‑edge TPU (Tensor Processing Unit... ...include Googlers, Google Cloud customers, and billions... ...Compute IP releases to the SoC. Enhance scripts and...Worldwide$163k - $237k
Google Inc. in Sunnyvale, CA is seeking a Senior Design and Integration Engineer for Cloud TPU. In this role, you will shape the future of AI/ML hardware by driving the design and optimization of Tensor Processing Units (TPUs). Responsibilities include defining microarchitecture...$126.8k - $220.9k
Apple Inc. is looking for a skilled engineer to develop signal processing designs for wireless communication SoCs. In this role, you will be responsible for RTL coding, design verification, and support in silicon bringup processes. Candidates should have a Bachelor’s degree...- Intel Corporation in Santa Clara is seeking a Power and Performance Design Engineer to design and optimize cutting-edge IPs and SoCs. You will play a critical role in influencing new architectures and ensuring market demands are met. The ideal candidate has extensive experience...
- ...SoC Design Verification Engineer Work Locations (2) Submit Resume Do you have a passion for invention and self-challenge? This position gives you the opportunity to be a part of one of the most innovative and key projects that Apple's Silicon Engineering Group has...Flexible hours
$110.6k - $140k
Responsibilities Image sensor control or processing function design and verification High speed interface (USB/MIPI) design and verification... .... Knowledge of FPGA and emulation platforms. Knowledge of SOC architecture. Knowledge of assertion-based formal verification...$170k - $230k
SpaceX is seeking a Sr. SOC/ASIC Physical Design Engineer to develop next-generation silicon for space and ground infrastructures. You'll work with top engineers across various disciplines to enhance the Starlink network, enabling connectivity globally. Ideal candidates...$143.1k - $264.2k
SoC Physical Design Engineer, PnR job at Apple Inc.. Sunnyvale, CA. Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's...Relocation- NVIDIA is looking for a Senior SOC Design Engineer to join our SOC Design team! As a Senior SOC Design Engineer, you’ll work at the forefront of technology, integrating advanced ASICs and partnering with experts in ASIC design, Physical Design, CAD, Package Design, Software...
- Google in Sunnyvale is seeking a skilled engineer to innovate in AI/ML hardware acceleration... ..., collaborating with validation and design teams to ensure quality and achieve timing... ...opportunity to contribute to cutting-edge TPU technology and help shape the future of computing...Full time
- ...drive innovation in AI/ML hardware acceleration through advanced TPU technology. This role involves creating cutting-edge silicon... ...teams. The ideal candidate should have extensive experience in ASIC design and a strong foundation in RTL development, focusing on...
$190.61k - $269.1k
Position Overview Intel's AI SoC organization develops cutting‑edge products powering... ...data center accelerators. If you are an engineer with strong technical and communication skills... ...verified, synthesis‑ and timing‑clean designs Collaborate closely with verification teams...Local areaShift work$138k - $198k
...future of AI/ML hardware technology. In this role, you will drive cutting-edge TPU technology that powers some of the most demanding applications. Responsibilities include creating design specifications, developing SystemVerilog RTL for ASIC products, and collaborating...$126.8k - $220.9k
...wireless silicon development team. Our wireless SoC organization is responsible for all... ..., emphasizing highly energy-efficient design and new technologies that transform the user... ...by a world-class vertically integrated engineering team spanning RF/Analog architecture and...Relocation$138k - $198k
...Bachelor's degree in Electrical Engineering, Computer Engineering,... ...years of experience with digital design using SystemVerilog RTL. Experience... ...to drive cutting‑edge TPU (Tensor Processing Unit) technology... ...customers include Googlers, Google Cloud customers, and billions of...Full timeWorldwide$138k - $198k
...Qualifications Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science,... .... 4 years of experience with digital design using SystemVerilog RTL. Experience with... ...an opportunity to drive cutting‑edge TPU (Tensor Processing Unit) technology that...Worldwide- SPACE EXPLORATION TECHNOLOGIES CORP (SpaceX) in Sunnyvale, CA is looking for a Sr. SOC/ASIC Physical Design Engineer. The role involves developing cutting-edge silicon for deployment in space and improving physical design methodologies to enhance the Starlink network. Ideal...
$163k - $237k
...Qualifications Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science,... .... 8 years of experience in ASIC design. Experience interacting with software, system... ...complex digital designs, focusing on TPU architecture and its integration within AI...- A leading technology company in Sunnyvale is seeking a SoC Physical Design Engineer. Candidates should have a minimum of a BS degree and over 3 years of industry experience, focusing on partition-level P&R implementation. Responsibilities include working alongside the...
$170k - $230k
...actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. SR. SOC/ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we’re leveraging our experience in building rockets and spacecraft to deploy Starlink...Permanent employmentTemporary workWorldwideWeekend work$126.8k - $190.9k
A leading technology company located in Cupertino is seeking a Design Verification Engineer who will be responsible for verifying the functionality and performance of SOCs. The role involves collaboration across various teams to ensure the highest quality in chip design...$138k - $198k
...ML hardware acceleration, particularly in TPU technology. The successful candidate will have a strong background in ASIC RTL design and responsibilities include creating micro... ...hold a Bachelor’s degree in Electrical Engineering or a related field and possess a minimum of...
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