Principal FPGA/ASIC Engineer - Level 3

RELOCATION ASSISTANCE: No relocation assistance available. CLEARANCE REQUIRED FOR START: No CLEARANCE TYPE: None TRAVEL: Yes, 10% of the Time Description At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people’s lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history—from the first flight across the Atlantic Ocean to stealth bombers to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work — and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history; they’re making history. Principal FPGA/ASIC Engineer – Level 3 Location: Gilbert, AZ Role Overview: The Principal FPGA/ASIC Engineer will be responsible for research, requirements analysis and systems architecture, design, coding, test bench design, verification, synthesis and place & route for our Command and Data Handling (C&DH) products. The ideal candidate will have demonstrated expertise in FPGA/ASIC for space applications. Job Responsibilities HDL design for FPGA and/or ASIC applications FPGA/ASIC verification via simulation and emulation (lab testing) FPGA/ASIC synthesis, timing analysis, and place & route FPGA design for space environments or space applications Basic Qualifications Bachelor’s degree in a STEM discipline with 5+ years of FPGA design (or related) engineering experience OR Master’s degree in a STEM discipline with 3+ years of FPGA design (or related) engineering experience OR Ph.D. in a STEM discipline with 1+ year(s) of FPGA design (or related) engineering experience Prior work experience in HDL design for an aerospace environment or space application Proficiency in FPGA design flow including RTL/gate level simulation, synthesis, place & route, static timing analysis, and power analysis Industry experience in FPGA Design, Simulation and V&V Must be able and willing to obtain and maintain an active DoD Top Secret clearance Preferred Qualifications Advanced degree in Electrical or Computer Engineering Active DoD Top Secret clearance Experience with Electronic Design Automation (EDA) Tools (e.g., Xilinx ISE/Vivado, Mentor Graphics ModelSim/QuestaSim, Synplify) Implementation of Digital Signal or Image Processing algorithms on FPGAs Expertise achieving timing closure on FPGA designs and generating test benches for full functional simulation Experience working with or developing test benches using System Verilog and Universal Verification Methodology (UVM) Experience debugging down to the hardware level with tools such as Signal Generators, Logic Analyzers, Digital Oscilloscopes and Embedded FPGA Debugging tools Benefits Medical, Dental & Vision coverage 401(k) Educational Assistance Life Insurance Employee Assistance Programs & Work/Life Solutions Paid Time Off Health & Wellness Resources Employee Discounts Flexible Schedules (e.g., 9/80 work schedule) Compensation Primary Level Salary Range: $79,300.00 - $118,900.00. The above salary range represents a general guideline; however, Northrop Grumman considers a number of factors when determining base salary offers such as the scope and responsibilities of the position and the candidate’s experience, education, skills and current market conditions. Depending on the position, employees may be eligible for overtime, shift differential, and a discretionary bonus in addition to base pay. Annual bonuses are designed to reward individual contributions and allow employees to share in company results. Employees in Vice President or Director positions may be eligible for Long Term Incentives. In addition, Northrop Grumman provides a variety of benefits including health insurance coverage, life and disability insurance, savings plan, company paid holidays and paid time off (PTO) for vacation and/or personal business. EEO Statement Northrop Grumman is an Equal Opportunity Employer, making decisions without regard to race, color, religion, creed, sex, sexual orientation, gender identity, marital status, national origin, age, veteran status, disability, or any other protected class. For our complete EEO and pay transparency statement, please visit U.S. Citizenship is required for all positions with a government clearance and certain other restricted positions. #J-18808-Ljbffr Northrop Grumman