Sign up to access all features of our service.
  • Job search
  • Favorites
  • Create a CV
    New
  • Salaries
  • Subscriptions

ASIC DFT Technical Leader

$186.9k - $267.7k

Cisco Systems, Inc

The application window is expected to close on: 12/17/2026

Meet the Team:

The Silicon One team creates innovative hardware platforms central to the AI era, powering Cisco’s core Switching, Routing, and Wireless products for organizations globally. Our innovations in silicon, optics, and hardware platforms are shaping the technology industry. We're a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow. Because full product development—from design to qualification to production—is within our team, we’re able to think differently, experiment more, and work quickly. Join us to power the future of the digital world

Your Impact:

You will be a key member of the Silicon One development organization, collaborating closely with Front-end RTL and backend physical design teams to gain a deep understanding of chip architecture. Your primary focus will be to drive high-quality Structural test, functional test , diagnostic feature implementation, IP development and integration, and test access including high speed IO with protocol ensuring robust and reliable silicon solutions that meet Cisco’s standards for performance and innovation. This cross-functional teamwork is essential to delivering advanced networking silicon aligned with Cisco Silicon One’s scalable and flexible architecture.

Minimum Qualifications:

  • 10+ years of industry experience in ASIC digital design.
  • Prior experience in Verilog/System Verilog coding.
  • Prior experience with front-end tools (Verilog simulators, linting, CDC checkers, synthesis, formal verification).
  • Prior experience with industry standard interface protocols such as AMBA(AXI, APB, AHB), JTAG etc, memories.

Preferred Qualifications:

  • Experience with power optimization techniques , power intent (UPF), power estimation.
  • Experience with DFT/MBIST
  • Experience with post-silicon debug

Why Cisco?

At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.

Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere.

We are Cisco, and our power starts with you.

Message to applicants applying to work in the U.S. and/or Canada:

The starting salary range posted for this position is $186,900.00 to $267,700.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits.

Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process.

U.S. employees are offered benefits, subject to Cisco’s plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time.

U.S. employees are eligible for paid time away as described below, subject to Cisco’s policies:

  • 10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees
  • 1 paid day off for employee’s birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco
  • Non-exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees
  • Exempt employees participate in Cisco’s flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations)
  • 80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours ofunused sick timecarried forwardfrom one calendar yearto the next
  • Additional paid time away may be requested to deal with critical or emergency issues for family members
  • Optional 10 paid days per full calendar year to volunteer

For non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco’s policies.

Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows:

  • .75% of incentive target for each 1% of revenue attainment up to 50% of quota;
  • 1.5% of incentive target for each 1% of attainment between 50% and 75%;
  • 1% of incentive target for each 1% of attainment between 75% and 100%; and
  • Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation.

For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid.

The applicable full salary ranges for this position, by specific state, are listed below:

New York City Metro Area:

$186,900.00 - $307,800.00

Non-Metro New York state & Washington state:

$166,300.00 - $274,100.00

* For quota-based sales roles on Cisco’s sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined.

** Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.

#J-18808-Ljbffr

Vacancy posted 1 day ago
Similar jobs that could be interesting for youBased on the ASIC DFT Technical Leader in San Jose, CA vacancy
  • $177.6k - $257.4k

     ...us to power the future of the digital worldYour Impact:You will be in the Silicon One development organization as a senior ASIC post silicon DFT Lead. You will work with post silicon product engineering team, Reliability, Board team, package team, functional test team... 
    Suggested
    Full time
    Temporary work
    Local area
    Flexible hours

    CISCO Systems

    San Jose, CA
    3 days ago
  • $186.9k - $267.7k

     ...Join us to power the future of the digital world. Your Impact:You will be in the Silicon One development organization as an ASIC Technical Leader- DFT. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT... 
    Suggested
    Full time
    Temporary work
    Local area
    Flexible hours

    CISCO Systems

    San Jose, CA
    2 days ago
  • $214.1k - $309.8k

     ...will be part of the Silicon One development organization as an ASIC Technical Lead- MBIST engineer. As a member of this team you will be...  ...least 12+years (or Master's with 10+ years) of experience in ASIC DFT​.Prior experience with memory architectures (SRAM, DRAM, etc.)... 
    Suggested
    Full time
    Temporary work
    Local area
    Flexible hours

    CISCO Systems

    San Jose, CA
    2 days ago
  • $186.9k - $267.7k

     ...'s ground-breaking solutions by designing, developing and testing some of the most complex ASICs being developed in the industry. Your ImpactAs an ASIC DFT - Emulation Technical Lead, you will play a critical role in driving the DFT emulation strategy for Silicon One.... 
    Suggested
    Full time
    Temporary work
    Local area
    Flexible hours

    CISCO Systems

    San Jose, CA
    1 day ago
  •  ...experts can help you find the best job for you. Role: Lead ASIC DFT Engineer Location: Remote Duration: 1 year Required...  ...for complex ASIC and SoC designs. This role requires deep technical ownership across DFT architecture, scan insertion, ATPG, MBIST... 
    Suggested
    Permanent employment
    Contract work
    Remote work

    Tekfortune Inc

    San Jose, CA
    20 hours ago
  • $186.9k - $267.7k

     ...revolutionary solutions by designing, developing and testing some of the most complex ASICs being developed in the industry.Your Impact:As a technical leader, you will own and drive end-to-end DFT flow architecture, building and maintaining scalable CAD infrastructure that... 
    Full time
    Temporary work
    Local area
    Flexible hours

    CISCO Systems

    San Jose, CA
    4 days ago
  • $186.9k - $267.7k

     ...Operations, you’ll join forces with expert ASIC design teams in the Central Hardware...  ...of the latest state-of-the-art trends in DFT insertion techniques, including Scan, ATPG...  ...leadership across many parts of Cisco's technical entities to provide bleeding-edge solutions... 
    Full time
    Temporary work
    Work at office
    Local area
    Flexible hours

    CISCO Systems

    San Jose, CA
    2 days ago
  • $186.9k - $267.7k

     ...Operations, you’ll join forces with expert ASIC design teams in the Central Hardware...  ...of the latest state-of-the-art trends in DFT insertion techniques, including Scan, ATPG...  ...leadership across many parts of Cisco's technical entities to provide bleeding-edge solutions... 
    Full time
    Temporary work
    Work at office
    Local area
    Flexible hours

    Cisco Systems, Inc

    San Jose, CA
    1 day ago
  • $186.9k - $267.7k

     ...to power the future of the digital world. Your Impact You will be in the Silicon One development organization as an ASIC DFT STA Technical Lead. You are a detail-oriented STA engineer with strong analytical skills and a deep understanding of timing constraints,... 
    Full time
    Temporary work
    Work experience placement
    Local area
    Flexible hours
    Shift work

    020 Cisco Systems, Inc.

    San Jose, CA
    1 day ago
  •  ...elevate their impact.You're an experienced ASIC/FPGA design engineer who has delivered...  ...functional area. Instead, you'll serve as a technical partner to chip leads across dynamic,...  ...optimization techniquesManufacturing test and DFT methodologiesSilicon bring-up and... 

    AMD

    San Jose, CA
    4 days ago
  • $143.8k - $230k

     ...high-impact role, you will be the primary technical anchor responsible for the top-level...  ...+ years of direct industry experience in ASIC/SoC digital design, with a proven track record...  ...custom interconnects).Familiarity with DFT (Design for Test) planning, including scan... 
    Full time
    Local area

    Broadcom

    San Jose, CA
    5 days ago
  • $214.1k - $309.8k

     ...ground-breaking solutions by designing, developing and testing some of the most complex ASICs being developed in the industry. Your ImpactAs an ASIC DFT - Emulation Technical Leader, you will play a critical role in driving the DFT emulation strategy for Silicon One’s DFT... 
    Full time
    Temporary work
    Local area
    Flexible hours

    CISCO Systems

    San Jose, CA
    4 days ago
  • $192k - $278k

     ...integrity.Partner with internal teams (RTL, DFT, methodology, packaging) to achieve...  ...route, and timing closure for high-speed ASICs across various process nodes.Experience in...  ...physical sign-off, and 2.5D/3D packaging.Technical leadership experience managing execution... 
    Worldwide

    Google

    Sunnyvale, CA
    2 days ago
  • $213k - $287.5k

     ...and software stacks enable us to take on technical challenges that have never been seen before...  ...technologies. We’re looking for an ASIC Design Eengineer to help us trail-blaze new...  ...SOC, ensure correct clock/reset/functional/DFT signal routing- Analyze design, microarchitecture... 
    Local area
    Flexible hours

    Amazon

    Cupertino, CA
    5 days ago
  •  ...of SystemVerilog/Verilog (for correlating failures to rtl if needed)   Good to have (not critical):  * Scan insertion * RTL DFT Verification capability (MBIST, clocking etc..) * DFT DRC (spyglass) \nCompany Description Who We Are: Quest Global delivers world... 

    Quest Global

    San Jose, CA
    more than 2 months ago
  • $186.9k - $267.7k

     ...post silicon validation tests in the lab.Minimum QualificationsBachelor’s degree in Electrical or Computer engineering and 8+ years of ASIC Design experience, or Master’s degree in Electrical Engineering or Computer Engineering and 6+ years of ASIC Design experience, or... 
    Full time
    Temporary work
    Local area
    Flexible hours

    CISCO Systems

    San Jose, CA
    5 days ago
  • NVIDIA is seeking a DFT Methodology Engineer to drive advanced test access mechanisms, I1149.1/I1500/I1687, memory BIST, and DFX security for multi-million gate SoCs in Santa Clara, CA. You will partner with RTL, timing, physical design, and software teams to shape next... 

    Segment (Twilio)

    Santa Clara, CA
    1 day ago
  • $220k - $250k

     ...Tech Lead to drive micro-architecture, RTL development, and technical execution for complex ASIC/SoC programs. This role combines deep hands-on design...  ...Collaborate closely with: Physical Design (PD) STA / Timing / DFT teams Ensure high RTL quality via: Low-power (UPF)... 

    Bolt Graphics, Inc.

    Sunnyvale, CA
    3 days ago
  •  ...Responsibilities: Lead implementation of SSN based test flow DFT architectures, including scan insertion, compression/decompression...  ...+ 3 years of related experience Prior experience working with ASICs Prior experience in scan insertion and DFT setup, integration... 

    Omega Solutions Inc

    Sunnyvale, CA
    18 days ago
  • $214.1k - $309.8k

     ...track record of building complex and high-performance Silicon ASICs. Our silicon devices drive the world’s most complex networks...  ...We are seeking a highly qualified Signal and Power Integrity Technical Leader to help us develop our next generation ASIC packaging and lead... 
    Full time
    Temporary work
    Work at office
    Local area
    Remote work
    Flexible hours

    Cisco Systems, Inc

    San Jose, CA
    4 days ago
  • $171.6k - $245k

     ...manufacturability, and cost. Lead mechanical design decisions and technical reviews, working with silicon, signal integrity, power, board-...  ...packaging, substrates, or mechanical integration of ASIC packages, PCBs, or high-speed interconnects. Experience in one... 
    Full time
    Temporary work
    Local area
    Flexible hours

    020 Cisco Systems, Inc.

    San Jose, CA
    3 days ago
  • $186.9k - $267.7k

     ...software engineering roadmap.• May lead small-to-medium features from technical design through completion.• Contribute to delivery of high-...  ...and SDK development experience on NPU/DPU or networking ASICs· Experience with traffic generator tools such as IXIA & SpirentPreferred... 
    Full time
    Temporary work
    Local area
    Flexible hours

    CISCO Systems

    Milpitas, CA
    5 days ago
  • $240k - $333k

     ...in Electrical Engineering, Computer Engineering, or a related technical field.12 years of experience in design verification.Experience...  ...architecture and its integration within AI/ML-driven systems. As an ASIC Design Verification Technical Lead, you will define how Google... 
    Worldwide
    Shift work

    Google

    Sunnyvale, CA
    3 days ago
  • $186.9k - $267.7k

     ...TeamCisco Silicon One is the center of Cisco’s ASIC design and is driving the development of...  ...). Additionally, you’ll collaborate with leaders across different functions within the...  ...us.Your ImpactAs a Software Engineering Technical Leader for the Silicon One Customer Engineering... 
    Full time
    Temporary work
    Local area
    Flexible hours

    CISCO Systems

    San Jose, CA
    2 days ago
  • $237.5k - $286k

     ...OpenAI — they're all designing their own ASICs. The $50B custom silicon market is growing...  ...paralysis doesn't fly here. Deep technical expertise. This is hard engineering. We...  ...architecture, design, verification, firmware, DFT, and post-silicon teams to reduce product... 
    Remote work
    Shift work

    TylSemi, Inc.

    San Jose, CA
    1 day ago
  • $176.6k - $247.3k

     ...world-class server infrastructure; we’re handling massive scale and rapid integration of emergent technologies. We’re looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while ensuring high design quality and making the right... 
    Local area
    Work from home
    Flexible hours

    Amazon

    Cupertino, CA
    2 days ago
  • $209.5k - $299.2k

    Physical Design Technical LeadSkip to main contentAltera uses cookies and similar technologies...  ...with world-class peers across design, DFT, and analog teams* Clear career ladder to...  ...Qualifications:*** Experience with FPGA or structured-ASIC fabric implementation — Altera-specific... 
    Local area
    Shift work

    Altera

    San Jose, CA
    1 day ago
  • $171.6k - $245k

     ...designing, developing, and testing some of the most complex ASICs being developed in the industry.The Cisco Service Provider Routing...  ...Hardware Board Design Engineer, you will be a recognized technical leader for a product. You will apply deep hardware expertise to define... 
    Full time
    Contract work
    Temporary work
    Local area
    Flexible hours

    CISCO Systems

    Milpitas, CA
    4 days ago
  • $162.5k - $205.4k

     ...CA office.Meet the TeamCisco is seeking a Thermal Engineering Technical Leader to join a dynamic team focused on developing advanced thermal...  ...technologies at scale, contributing to Cisco’s next-generation ASIC, optical, and power systems.Your ImpactIn this role, you will... 
    Full time
    Temporary work
    Work at office
    Local area
    Flexible hours

    CISCO Systems

    San Jose, CA
    4 days ago
  • $186.9k - $267.7k

     ...team! This team works on Hyperscale network and Enterprise Data Center switches based on Cisco Silicon One ASIC. This is a unique opportunity to grow your technical skills and will allow for visibility and recognition across multi-functional teams within Cisco. We value... 
    Full time
    Temporary work
    Local area
    Flexible hours

    CISCO Systems

    San Jose, CA
    4 days ago

Do you want to receive more vacancies?

Subscribe and receive similar vacancies to ASIC DFT Technical Leader. Be the first to apply!